First Picture of a Cell Processor - Smaller Than a Pushpin, More Powerful Than a PC

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http://www.nytimes.com/2005/02/07/t...78e28e3f45125c3d&ei=5040&partner=MOREOVERNEWS



Smaller Than a Pushpin, More Powerful Than a PC
By JOHN MARKOFF

Published: February 7, 2005



















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AN FRANCISCO, Feb. 6 - In a new volley in the battle for digital home
entertainment, I.B.M., Sony and Toshiba will announce details Monday of
their newest microprocessor design, known as Cell, which is expected to
offer faster computing performance than microprocessors from Intel and
Advanced Micro Devices.

Anticipation of the announcement, to be made at an industry conference here,
has touched off widespread industry speculation over the impact of the new
chip technology, which promises to enhance video gaming and digital home
entertainment.

Sony plans to use the new Cell in its PlayStation 3, likely to be introduced
in 2006, and Toshiba plans to use the chip in advanced high-definition
televisions, also to be introduced next year.

However, many industry executives and analysts say that Cell's impact may
ultimately be much broader, staving off the PC industry's efforts to
dominate the digital living room and at the same time creating a new digital
computing ecosystem that includes Hollywood, the living room and
high-performance scientific and engineering markets.

"There is a new game in town, and it will revive an industry that has been
kind of sleepy for the last few years," said Richard Doherty, a computer
industry analyst and president of Envisioneering, a market research company
in Seaford, N.Y.

The Cell's introduction also comes at a time when the computer industry has
largely given up investing in fundamentally new processor designs and has
instead chosen to use the additional space available on the newest
generation of chips to place multiple processors and thus add performance.

The Cell chip, computer experts said, could have a theoretical peak
performance of 256 billion mathematical operations per second. With that
much processing power, the chip would have placed among the top 500
supercomputers on a list maintained by scientists at the University of
Mannheim and the University of Tennessee as recently as June 2002.

"This is extremely impressive," said Kevin Krewell, editor in chief of
Microprocessor Report, an industry technical publication, "and it proves
that architectural innovation isn't dead."

Several computer industry executives warned, however, that despite the
Cell's impressive specifications, success is not guaranteed for any new
design in the computer industry. For example, Intel and Hewlett-Packard have
spent more than a decade and hundreds of millions of dollars on the Itanium
and the chip has yet to find a receptive market.

The Cell has a modular design based on a slightly less powerful I.B.M.
processor that is currently in G5 64-bit desktop computers from Apple
Computer. Additionally, the Cell architecture is distinguished by the fact
that it controls an array of eight additional processors that the design
team refers to as synergistic processing elements, or S.P.E.'s. Each of the
S.P.E.'s is a 128-bit processor in its own right.

The Cell has some components that in the lab switch at 5.6 GHz, and several
people familiar with the design said that it was both more flexible than is
generally understood and that it has been designed with high bandwidth
communications, such as high-speed data links to homes, in mind.

"Cell has been optimized for broadband-rich applications," said Jim Kahle,
I.B.M.'s director of technology at the Design Center for Cell Technology,
the headquarters in Austin, Tex., for the I.B.M., Sony and Toshiba
partnership.

He said that I.B.M. had refined a technology also being developed by Intel
called "virtualization," which is designed to isolate applications from one
another. Originally used in mainframe computing applications, the technology
is now being exploited by consumer electronics designers to run demanding
applications like video decompression and decryption simultaneously.

One significant risk for Sony and I.B.M. is that the Sony PlayStation 3 game
machine is likely to be introduced later than the next generation of Xbox
from Microsoft. The PlayStation 2 beat the Xbox to market and Microsoft was
never able to catch up, meaning that it lost hundreds of millions of dollars
on its bet on the video game market.

In its next version of the Xbox, Microsoft plans to shift from using Pentium
chips from Intel to a PowerPC microprocessor from I.B.M. The chip will have
two PowerPC processor cores, but it will not be as radically new as the
I.B.M. Cell design that Sony plans to use, said one executive who is
familiar with the Microsoft project.

That will make for a fascinating rivalry: Sony is betting that its computer
horsepower advantage will be large enough to give it a quality advance over
Microsoft, even if it arrives late.

"Our goal with the Cell is to be an order of magnitude faster," said Lisa
Su, an I.B.M. executive in charge of technology development and licenses.

Many industry executives believe that because of its low cost, the Cell is a
harbinger of a fundamentally new computing era that will push increasingly
into consumer applications.

"I think it will aid in some of the convergence between consumer and
corporate I.T. and this will accelerate amazingly from the consumer side,"
said Andrew Heller, a former I.B.M. processor designer who is now chairman
of Heller & Associates, a consulting firm in Austin, Tex.

One area of wide speculation is whether Apple might become a partner in the
Cell alliance in the future. Apple is already the largest customer for the
PowerPC chip, and it would be simple for the company to take advantage of
the Cell design. Several people familiar with Apple's strategy, however,
said that the computer maker had yet to be convinced that the Cell
technology could provide a significant performance advantage.
 
I don't want to hype today *too* much, for fear of disappointment. but in
less than 10 hours, there is *supposed* to be quiet a bit of information
released on the Cell Processor Element, Cell APU and Cell PU. the basic
building blocks of Cell Processors and Cell Systems. As well as information
on the software side, if i'm not mistaken.

geeks have been waiting 4 years for this, since Cell was announced in early
2001.
 
NEXT said:
I don't want to hype today *too* much, for fear of disappointment.
but in less than 10 hours ... [snip]

geeks have been waiting 4 years for this, since Cell was announced in
early 2001.

Personally, I can wait another 10 hours. I can even wait a further few
days for folks to digest the information. Besides, anyone who has been
holding their breath for 4 years will have died of "hype-oventilation".
 
IBM, Sony, Sony Computer Entertainment Inc. and Toshiba Disclose Key
Details of the Cell Chip
Monday February 7, 1:00 pm ET
Innovative Design Features Eight Synergistic Cores Together with Power Based
Core, Delivers More Than 10 Times the Performance of the Latest PC
Processors

SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- At the International Solid
State Circuits Conference (ISSCC) today, IBM, Sony Corporation, Sony
Computer Entertainment Inc. (Sony and Sony Computer Entertainment
collectively referred to as Sony Group) and Toshiba Corporation (Toshiba)
for the first time disclosed in detail the breakthrough multi-core
architectural design - featuring supercomputer-like floating point
performance with observed clock speeds greater than 4 GHz - of their jointly
developed microprocessor code-named Cell.

Source: IBM

· View multimedia news release


A team of IBM, Sony Group and Toshiba engineers has collaborated on
development of the Cell microprocessor at a joint design center established
in Austin, Texas, since March 2001. The prototype chip is 221 mm(2),
integrates 234 million transistors, and is fabricated with 90 nanometer SOI
technology.

Cell's breakthrough multi-core architecture and ultra high-speed
communications capabilities deliver vastly improved, real-time response for
entertainment and rich media applications, in many cases 10 times the
performance of the latest PC processors.

Effectively a "supercomputer on a chip" incorporating advanced
multi-processing technologies used in IBM's sophisticated servers, Sony
Group's computer entertainment systems and Toshiba's advanced semiconductor
technology, Cell will become the broadband processor used for industrial
applications to the new digital home.

Another advantage of Cell is to support multiple operating systems, such as
conventional operating systems (including Linux), real-time operating
systems for computer entertainment and consumer electronics applications as
well as guest operating systems for specific applications, simultaneously.

Initial production of Cell microprocessors is expected to begin at IBM's
300mm wafer fabrication facility in East Fishkill, N.Y., followed by Sony
Group's Nagasaki Fab, this year. IBM, Sony Group and Toshiba expect to
promote Cell-based products including a broad range of industry-wide
applications, from digital televisions to home servers to supercomputers.

Among the highlights of Cell released today:

* Cell is a breakthrough architectural design -- featuring eight synergistic
processors and top clock speeds of greater than 4 GHz (as measured during
initial hardware testing)
* Cell is a multicore chip capable of massive floating point processing
* Cell is OS neutral and supports multiple operating systems simultaneously

"Today's disclosure of the Cell chip's breakthrough architectural design is
a significant milestone in an ambitious project that began four years ago
with the creation of the IBM, Sony and Toshiba design lab in Austin, Texas,"
said William Zeitler, senior vice president and group executive, IBM Systems
and Technology Group. "Today we see the tangible results of our
collaboration: an open, multi-core, microprocessor that portends a new era
in graphics and multi-media performance."

"Today, we are very proud to share with you the first development of the
Cell project, initiated with aspirations by the joint team of IBM, Sony
Group and Toshiba in March 2001," said Ken Kutaragi, executive deputy
president and COO, Sony Corporation, and president and Group CEO, Sony
Computer Entertainment Inc. "With Cell opening a doorway, a new chapter in
computer science is about to begin."

"We are proud that Cell, a revolutionary microprocessor with a brand new
architecture that leapfrogs the performance of existing processors, has been
created through a perfect synergy of IBM, Sony Group and Toshiba's
capabilities and talented resources, "said Masashi Muromachi, corporate vice
president of Toshiba Corporation and president & CEO of Toshiba's
Semiconductor Company. "We are confident that Cell will provide major
momentum for the progress of digital convergence, as a core device
sustaining a whole spectrum of advanced information-rich broadband
applications, from consumer electronics, home entertainment through various
industrial systems."
 
http://biz.yahoo.com/bw/050207/75391_1.html
Cell Processor Uses Rambus High Speed Interface Solutions
Monday February 7, 1:01 pm ET
XDR(R) DRAM and Redwood FlexIO(TM) Processor Bus Provide Unprecedented
Bandwidth for Next-Generation Computer and Consumer Applications


SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS -
News), a leading developer of chip interface products and services, today
revealed that the Cell processor incorporates Rambus's XDR memory and
FlexIO(TM) processor bus interface solutions. Cell is the highly-anticipated
advanced microprocessor developed by Sony Corporation, Sony Computer
Entertainment, Toshiba Corporation and IBM. The memory and processor bus
interfaces designed by Rambus account for 90% of the Cell processor signal
pins, providing an unprecedented aggregate processor I/O bandwidth of
approximately 100 gigabytes-per-second.
Rambus is scheduled to discuss the Cell interface clocking and circuit
design at the International Solid State Circuits Society conference in San
Francisco on February 9, 2005.

"The Cell processor, that has overwhelming computational power, demands
another overwhelming data transfer capability between Cell and main memory
system, and Input/Output systems. Rambus, underpinned by its expertise in
latest memory technology, provided us with a clear solution that was
absolutely the best match to Cell," said Ken Kutaragi, executive deputy
president and COO, Sony Corporation, and president and Group CEO, Sony
Computer Entertainment Inc. "I respect Rambus and all our team members that
collaborated together for completing this challenging work with all the
technology and enthusiasm they possess."

"We have been busy working with the Sony Group and Toshiba on the
development of the Cell processor for the past couple of years and we're
excited to see this advanced engineering effort become a reality," said
Harold Hughes, chief executive officer at Rambus. "Our engineering teams
have not only designed and developed the world's fastest memory and logic
interfaces but we continue to help our customers integrate various system
components which enable them to bring high-performance, high-value products
to the market."

The Rambus XDR memory interface, capable of data rates of 3.2GHz to 8.0GHz,
achieves data rate speeds that are an order of magnitude higher than today's
mainstream PC memory systems while utilizing fewer DRAMs and fewer
controller pins. FlexIO processor buses, formerly codenamed Redwood, are
capable of running up to 6.4GHz data rates providing bandwidth more than
four times faster than best-of-class processor buses available today. All
Rambus high-speed interfaces are developed as complete solutions for
high-volume, low-cost systems.

Sony and Toshiba signed a licensing agreement with Rambus in January 2003.
Since then the engineering teams have worked closely to design and develop
the high-bandwidth interface solutions necessary for next-generation
computing and consumer devices.

About Rambus Inc.

Rambus is one of the world's leading providers of advanced chip interface
products and services. Since its founding in 1990, the company's
innovations, breakthrough technologies and integration expertise have helped
industry-leading chip and system companies solve their most challenging and
complex I/O problems and bring their products to market. Rambus's interface
solutions can be found in numerous computing, consumer, and communications
products and applications. Rambus is headquartered in Los Altos, California,
with regional offices in Chapel Hill, North Carolina, Taipei, Taiwan and
Tokyo, Japan. Additional information is available at www.rambus.com.

Note to Editors: For information on the Cell processor, please see "IBM,
Sony, Sony Computer Entertainment Inc. and Toshiba Disclose Key Details of
the Cell Chip" press release issued today at 10:00 a.m. PST.
 
NEXT BOX said:
http://biz.yahoo.com/bw/050207/75391_1.html
Cell Processor Uses Rambus High Speed Interface Solutions
Monday February 7, 1:01 pm ET
XDR(R) DRAM and Redwood FlexIO(TM) Processor Bus Provide Unprecedented
Bandwidth for Next-Generation Computer and Consumer Applications


SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS -
News), a leading developer of chip interface products and services, today
revealed that the Cell processor incorporates Rambus's XDR memory and
FlexIO(TM) processor bus interface solutions.

I think all these years Rambus has only accomplished one thing-- Rambus
memory interface system adds one simple processor to control traffic between
memory and system bus. As system clock becomes faster, data skew problem
becomes more serious. It is one solution, not the ONLY solution. As RDRAM vs
DDR results shown, the best solution is not to add an active stage. The
addition of the new circuits might become the bottleneck of computer
systems. We saw latency on system with RDRAM. When they show how great the
bandwidth is, they are always feeding the system the ideal data streams.

And Rambus probably get the idea from Adaptec whose SCSI controller is to
use one simple processor to control traffic betweem storage and system bus.
The original idea is from Adaptec. But Rambus wants to extend its patents to
cover everything interfacing computer components.
 
http://www.realworldtech.com/forums...PostNum=3098&Thread=1&entryID=45958&roomID=13

Name: David Wang ([email protected]) 2/7/05

Today is the day that the CELL processor family gets announced.
I'll be writing a few things about the various papers at ISSCC on CELL, but
before the news conference starts and the papers gets official unveiling,
some interesting data have already been presented in the technical digests.

The CELL processor presented has 1 64b PPC core acting as the traditional
scalar processor, complete with its own L2. The PPE (PowerPC processing
Element) is connected to 8 other SPE's (Synergistic Processing Elements) The
SPE's are the magic glue that is suppose to contain enormous amount of
compute power and a bunch of them gets you the enormously large flop rating
that we've all head much about.

Some stats.

1. 90nm SOI process.

2. Logic depth is functionally equivalent to about 20 FO4 (est), but circuit
speed equivalence is 11 FO4 per stage. The short pipestage circuit depth is
reached with "circuit efficiencies" and Dynamic logic !?!

3. With per stage delay of 11 FO4, the schmoo plots show that the SPE's can
crank from 3.2 GHz @ 0.9V Vdd to 5.2 GHz @ 1.3 V Vdd. The entire chip has
similar frequency/voltage range, but to get to 5.2 Ghz @ 1.3V, each SPE will
eat 11~12W. Add in the rest and the chip will get really hot. 4 GHz @ 1.1V =
4W per SPE seems to be the nominal range.

4. Die size per SPE is 2.5 x 5.81 mm^2. The entire chip with 8 SPE's seems
to be about 17.2 x 12 mm^2. That seems to be an awfully large chip for IBM.
The CPU to be used in PS3/Xbox2 will probably be the 65nm version or it'll
have to have fewer SPE's.

6. As previously announced, the off chip I/O interface is Rambus Redwood and
the memory interface is XDR. Similar clocking/deskewing schemes. Looks to be
about ~50 GB/s BW to memory, and 50~100 GB/s to I/O.

I'll write up articles as the papers are presented.
 
http://www.wired.com/news/infostructure/0,1377,66528,00.html?tw=newsletter_topstories_html
New Chip to Challenge Intel






02:04 PM Feb. 07, 2005 PT

SAN FRANCISCO -- Setting up a battle for the future of computing, engineers
from IBM, Sony and Toshiba unveiled details Monday of a microprocessor they
claim has the muscle of a supercomputer and can power everything from
video-game consoles to business computers.

Devices built with the processor, code-named Cell, will compete directly
with the PC chips that have powered most of the world's personal computers
for a quarter century.

Wireless Hot Spot burgeoning world of rich media and broadband networks in
mind, can deliver 10 times the performance over today's PC processors.

It also will not carry the same technical baggage that has made most of
today's computers compatible with older PCs. That architectural divergence
will challenge the current dominant paradigm of computing that Microsoft and
Intel have fostered.

The new chip is expected to be used in Sony's next-generation PlayStation
game console. Toshiba plans to incorporate it into high-end televisions. And
IBM has said it will sell a workstation with the chip.

Beyond that, companies are remaining coy about where it might be used and
whether it will be compatible with older technology.

"With this massive computing power, we'll get to the point where we'll get
closer to (a) photo-realistic-type effect that will be able to be generated
by the computer," said Jim Kahle, an IBM fellow.

Supercomputer claims are nothing new in the high-tech industry, and over the
years chip and computer companies have steadily improved microprocessor
performance even without altering chips' underlying architecture.

And while its competitors may well match the Cell chip in performance by the
time it debuts in 2006, it differs considerably from today's processors in
constitution.

Cell is comprised of several computing engines, or cores. A core based on
IBM's Power architecture controls eight "synergistic" processing centers. In
all, they can simultaneously carry out 10 instruction sequences, compared
with two for today's Intel chips.

The new microprocessor also is expected to be able to run multiple operating
systems and programs at the same time while ensuring each has enough
resources. In the home, that could allow for a device that's capable of
handling a video game, television and general-purpose computer at once.

"It's very flexible," Kahle said. "We support many operating systems with
our virtualization technology so we can run multiple operating systems at
the same time, doing different jobs on the system."

Later this year, Intel and Advanced Micro Devices plan to release their own
"multicore" chips, which also increase the number of instructions that can
be executed at once. IBM and Sun Microsystems already sell chips with
multiple cores, mainly for business servers.





Cell also appears to have an advantage in the number of transistors -- 234
million compared with 125 million for today's latest Pentium 4 chips.
Traditional chipmakers, however, have regularly doubled their number of
transistors every 12 to 18 months.

Cell is said to run at clock speeds greater than 4 GHz, which would top the
3.8 GHz of Intel's current top-speed chip.


Cell's designers said they are running a variety of operating systems on the
processor at their lab in Austin, Texas. But they would not say whether
Microsoft's Windows is one of them. In fact, they only confirmed running
Linux.

The PC industry has seen a long line of chips attempt to usurp the x86
architecture pioneered by Intel that dominates today's computers. But all
have failed, and Intel remains the world's largest chipmaker.

In the 1990s, IBM, Motorola and Apple Computer pushed the PowerPC
architecture. Though it's still used by the Apple Macintosh as well as IBM
workstations and servers, it failed to dethrone Intel.

Most recently, Transmeta's Crusoe was supposed to challenge Intel's
dominance in notebooks. Launched at the twilight of the tech boom in 2000,
it gained only marginal acceptance, and the company is now considering plans
to focus on licensing its patents.

Intel has since developed its own mobile chip technology, Centrino.

"Transmeta was also a disruptive influence in the market. And because of
Transmeta, we've got Centrino and the advances that have happened in mobile
computing," said Steve Kleynhans, a Meta Group analyst. "Unfortunately, we
don't really have Transmeta anymore."

For a challenger to succeed in displacing x86, it will have to perform
considerably better since it also will break computing's long-standing
tradition of backward and forward compatibility, said Justin Rattner, who
oversees Intel's Corporate Technology Group.

"They're going to have to show they're able to do things that conventional
architectures at least at the moment are incapable of doing," he said.
"That's the fundamental question."

The Cell's specifications also suggest the PlayStation 3 will offer
realistic graphics and strong performance. But analysts cautioned that not
all the features in a product announcement will find their way into all
systems built on the device.

"Any new technology like this has two components," Kleynhans said. "It has
the vision of what it could be because you need the big vision to sell it.
Then there's the reality of how it's really going to be used, which (is)
generally several levels down the chain from there."
 
Using a finger dipped in purple ink said:
Rambus is scheduled to discuss the Cell interface clocking and circuit
design at the International Solid State Circuits Society conference in San
Francisco on February 9, 2005.

After which, they'll file a slew of lawsuits,
claiming they developed the technology 20 years ago.
 
Using a finger dipped in purple ink said:
* Cell is a breakthrough architectural design -- featuring eight synergistic
processors and top clock speeds of greater than 4 GHz (as measured during
initial hardware testing)
* Cell is a multicore chip capable of massive floating point processing
* Cell is OS neutral and supports multiple operating systems simultaneously

KEWL!~

So my websurfing, on a 28K dialup, will be even FASTER than with P4,
which we all know is SO much faster an AMD CPU for internet activity!
 
On Mon, 07 Feb 2005 14:38:55 -0600, NEXT BOX wrote:

nice spam. ...but you didn't answer the question.
 
http://babelfish.altavista.com/babe...ch.impress.co.jp/docs/2005/0208/kaigai153.htm

Cell processor with ISSCC in announcement
Finally, the Cell processor of topic dispersed that veil.

It is held in the American San Francisco, "ISSCC (IEEE International
Solid-State Circuits Conference)" with, IBM, the SONY group (SONY, the SONY
computer entertainment), Toshiba developed did the technical announcement of
the "Cell processor" jointly at 3 corporations. Rambus which is cooperative
to 3 corporations and development in the schedule which does the
dissertation announcement regarding Cell with ISSCC, leading that, held the
briefing for press at the Mariotte hotel of the ISSCC meeting place.

As for this time being announced, the technical summary of Cell of the first
generation who is produced with 90nm SOI process. Cell, with multiple core
CPU, loads 9 processor cores in one CPU. For the PC/ server as for CPU, as
for Cell the fact that the quantity of 9 and the CPU core is many is feature
in the same 90nm generation vis-a-vis being the dual core CPU which places 2
CPU cores. In addition, with the multiple core which Intel and AMD develop,
the processor core of the same architecture plural is loaded. Vis-a-vis
that, Cell combines the processor core where 2 types differ.

1 general-purpose processor core and, 8 the relatively simple processor core
is combined in 90nm edition Cell. The general-purpose processor core is
called being something which designates the 64bit POWER architecture of IBM
as the base "POWER Processor Element (PPE)" with. 8 cores, SIMD which faces
to multimedia type processing and the like (Single Instruction and Multiple
Data)"Synergistic Processor Element (SPE)" with are called with architecture
of type. However, it is not the architecture which is specialized in
processing of streaming type, also is widely used very.

- Loading the wide band bus

In addition, other than processor core, new memory "XDR of wide band DRAM
(Yellowstone: Yellow stone)"wide band interface" FlexIO for interface and
tip/chip indirect continuation (Redwood: The redwood)"it loads. The point
where memory and the high-speed bus are taken in has been similar to the K8
system CPU of AMD, but Cell zone is much wider. It is the architecture which
avoids the fact that the bus becomes the problem of processing. Also GPU
which NVIDIA develops, is seen that it is connected to this FlexIO. Each
processor core and the interface group inside Cell "Element Interconnect Bus
(EIB)" with are connected with the internal bus of very is called wide band.

As for the operational frequency of Cell, you say that with the test inside
the laboratory it exceeds 4GHz. Until recently, under the present conditions
which the frequency improvement of Intel CPU which is top speed can blunt,
even in the 90nm generation 4GHz cannot commercialize, as for the frequency
of Cell it is top class. However, as for operational frequency and electric
power consumption because it is trade-off, when being loaded onto the system
really like PlayStation 3, as for the operational frequency of Cell, you say
that it differs depending upon each system.

Efficiency the single precision due to 8 SPE (32bit) reaches to 256 GFLOPS
with floating point arithmetic. This, when with 8 SPE executing the sum of
products calculation of 4 parallel SIMD with 8GHz, is numerical value. You
call 1TeraFLOPS with 1 tip/chip which at the beginning was expected although
it does not reach to the efficiency "of supercomputer class of just a little
front", with general purpose CPU by far it is. In addition, SPE because it
has the mechanism which can execute the streaming processing which is made
poor the general-purpose processor in high speed, becomes much fast than
former general purpose CPU depending upon processing. You say that
efficiency of 10 times can be actualized depending upon application.

Die/di size (area of semiconductor itself), with present trial manufacture
tip/chip 221mm2. This to be a little smaller than 239.7mm2 of the first
generation Emotion for PlayStation 2 Engine, 0.18 ? m edition Pentium 4
(Willamette: ??????) almost it is the same as 217mm2. In other words,
productivity and production cost mean the same level basically.



- PowerPC and instruction set interchangeable PPE


PPE of Cell is the processor core of POWER architecture, but you say that it
is not diversion of the existing core, it is the new core which from one was
developed with scratch. However, as for instruction set existing POWER
system CPU and being completely interchangeable, as for the software it is
possible to be able to send basically that way. In addition, with PPE,
PowerPC 970 (G5) with in the same way, AltiVec and interchangeable vectoring
operational function "VMX" of Motorola are mounted. In other words, PPE
PowerPC 970 (G5) with means the interchangeability.

Furthermore, PPE Hyper-Threading and similar SMT of Intel (Simultaneous
Multithreading) loads also function, it is possible to execute two threads
simultaneously. With PPE and 8 SPE which mount SMT of 2way, altogether Cell
10 threads can be executed in parallel. In other words, when you see from
software side, in order for there to be 10 CPU in Cell, it means to be
visible. PPE has L2 cash of 512KB.

As for SPE which 8 is loaded in Cell, it is the SIMD type processor which
can do the same processing simultaneously in 1 order vis-a-vis the plural
data. It is possible to think that it became the processor where SSE unit of
X86 type CPU becomes independent. Same as SSE, the single precision floating
point data of 32bit 4 and integer data 4 can be processed simultaneously in
1 order.

In addition, with SPE, the various architecture which are optimized in
streaming processing are taken in. For example, we have 128 these 128bit
registers, developing the loop which is in the midst of programming, to SIMD
converting, we are possible also to process in parallel. In addition, "Local
Store (LS)" of 256KB with the memory which is called is loaded.

The major feature of Cell is the point where bus the inside and outside the
tip/chip is very wide band. EIB which connects each element inside Cell the
transfer of 768bit is possible in 1 cycle. Because the usual on-chip bus is
128bit and 256bit, Cell is especially high speed. In addition, memory loads
the interface of the next generation memory XDR of Rambus DRAM at dual,
memory zone reaches to 25.6GB/sec. With the zone of 76.8GB/sec, dividing
into 2 ports, can FlexIO of interface between the tip/chip use. In other
words, it can connect 2 companion tips/chips such as GPU and the I/O chip.
In addition, like K8 of AMD also can plural Cell connect mutually with
FlexIO.
 
http://www.realworldtech.com/forums...PostNum=3098&Thread=1&entryID=45958&roomID=13

3. With per stage delay of 11 FO4, the schmoo plots show that the SPE's can
crank from 3.2 GHz @ 0.9V Vdd to 5.2 GHz @ 1.3 V Vdd. The entire chip has
similar frequency/voltage range, but to get to 5.2 Ghz @ 1.3V, each SPE will
eat 11~12W. Add in the rest and the chip will get really hot. 4 GHz @ 1.1V =
4W per SPE seems to be the nominal range.

Even at that they're talking about 32W JUST for the SPEs. Add in
another chunk for the PPE and you could easily be up in the 50-60W
range. Not much as compared to a modern, high-speed processor, but it
could complicate stuffing the thing into the cramped confines of a
gaming console.
4. Die size per SPE is 2.5 x 5.81 mm^2. The entire chip with 8 SPE's seems
to be about 17.2 x 12 mm^2. That seems to be an awfully large chip for IBM.
The CPU to be used in PS3/Xbox2 will probably be the 65nm version or it'll
have to have fewer SPE's.

Supposed to be about 220mm^2 total. Rather hefty processor. At a
(very) rough guess that should have a per-processor cost of somewhere
around $70-$80.
6. As previously announced, the off chip I/O interface is Rambus Redwood and
the memory interface is XDR. Similar clocking/deskewing schemes. Looks to be
about ~50 GB/s BW to memory, and 50~100 GB/s to I/O.

50GB/s of bandwidth has got to be at least 6 XDR channels, 16-bit wide
each, running at a bit over 4.1GT/s. Might even be as much as 8 XDR
channels. That ain't gonna come cheap. Nor will the 6 or 8 (at
least) memory chips required. High bandwidth I/O is going to be
expensive as well, and all this is probably going to require at least
an 8 layer PCB, adding more cost.

I'm really having a tough time figuring out just how Sony plans to get
this console into the ~$300 price range that they will probably need
to sell at. Even with taking a large loss on each console it'll be
tough.
 

I like how they make it sound small as compared to PC chips. The
actual processor is ~220mm^2 on a 90nm process.

For comparison, Intel's latest "Prescott" P4 has a die size of 112mm^2
and AMD's Athlon64 weighs in at a mere 84mm^2, both on a 90nm process.
Even the dual-core versions of these two processors will be smaller
than a Cell.
Sony plans to use the new Cell in its PlayStation 3, likely to be introduced
in 2006, and Toshiba plans to use the chip in advanced high-definition
televisions, also to be introduced next year.

Has anyone figured out how this processor is actually going to improve
a television in any way? I'm really curious about this one. Just
what is it that they're planning on processing in the TV signal? DRM?
However, many industry executives and analysts say that Cell's impact may
ultimately be much broader, staving off the PC industry's efforts to
dominate the digital living room and at the same time creating a new digital
computing ecosystem that includes Hollywood, the living room and
high-performance scientific and engineering markets.

Awful big claims for a processor that has exactly ZERO software
support. I've said it MANY times before and I'll say it many times in
the future, hardware is cheap, software is *EXPENSIVE*
"Cell has been optimized for broadband-rich applications," said Jim Kahle,
I.B.M.'s director of technology at the Design Center for Cell Technology,
the headquarters in Austin, Tex., for the I.B.M., Sony and Toshiba
partnership.

What, exactly, is a "broadband-rich" application? Playing computer
games?
He said that I.B.M. had refined a technology also being developed by Intel
called "virtualization," which is designed to isolate applications from one
another. Originally used in mainframe computing applications, the technology
is now being exploited by consumer electronics designers to run demanding
applications like video decompression and decryption simultaneously.

Hmm.. DVD players can do both decompression and decryption on about $1
worth of embedded controller + ASIC. How much more compression and/or
encryption are they really planning on here?
 
Tony said:
Has anyone figured out how this processor is actually going to improve
a television in any way? I'm really curious about this one. Just
what is it that they're planning on processing in the TV signal? DRM?

It will project a hologram of Jolene Blalock directly /into/ /your/ *brain*.
 
http://gamesindustry.biz/content_page.php?aid=6700

_________________________________________________________
Cell consortium reveals chip details, claim 4GHz + clock speeds

Rob Fahey 12:11 08/02/2005

Few surprises at unveiling, but eight-SPU design and high clock speeds are
confirmed

Official details of the Cell microprocessor have been revealed by partners
IBM, Sony and Toshiba, with the multi-core architecture set to be capable of
processing ten threads on a single chip clocked at over 4Ghz.

The chip package will consist of a 64 bit Power processor - similar to the
CPUs being used in the Xbox 2 and PowerMac G5 systems - which can process
two threads simultaneously, along with eight "synergistic processing units".

These SPUs are the real horsepower behind the chip; each one has 256KB of
its own memory and can handle computing tasks separately from the main
processor, which will be responsible for dividing up tasks between the SPUs
and running the operating system.

While clock speeds are an almost entirely meaningless measurement of
processor performance, especially when comparing chips as radically
different as Cell and the existing Intel / AMD families, much attention has
been focused on the claim that the Cell could start out at speeds of over
4GHz.

Despite not being a clear indicator of actual performance, the speed is
still a PR coup for IBM and its partners - since Intel's range of chips
currently maxes out at 3.8GHz, while Cell may go as high as 4.6GHz in its
early incarnations.

More useful as a performance measurement is the chip's rating in terms of
calculations per second, or "gigaflops", with Cell rated at 256 gigaflops
according to IBM - a fair bit short of an entry in the Top 500
Supercomputers list, which starts at 851 gigaflops, but still enormously
powerful for a single chip, and of course the chips are designed to operate
efficiently in clusters.

Indeed, it's widely expected that the PlayStation 3 could boast as many as
four Cell chips, which would give a theoretical CPU performance of over 1000
gigaflops, or one teraflop - a very theoretical measure, admittedly, but
still enough to earn the PS3 a place on the supercomputer list.

Another aspect of the performance which IBM has been quick to champion is
the memory bandwidth available to the Cell, with the design utilising RAMBUS
interface technology that delivers an unprecedented one hundred gigabytes
per second of bandwidth to the chip, with separate interfaces for
communicating with system memory and with other CPUs.

Despite Sony's claims, one thing we won't be seeing in the near future is
Cell being used in portable devices such as mobile phones - according to an
IBM spokesperson, the chip, which is initially being manufactured on a 90
nanometre process but will eventually move down to 65 nanometre, runs hot
enough to require a cooling fan, like most desktop CPUs.

Spokespeople from the Cell consortium were quick to point out the
flexibility of the system, saying that the multi-processor architecture
could be used in a variety of different ways by game developers or other
software creators.

However, game developers contacted by GamesIndustry.biz downplayed
speculation that the PS3 would be incredibly difficult to program as a
result of the new architecture, saying that the main difficulty would be the
move to a multi-core system - a design shared by the Xbox 2 and almost
certainly by the Nintendo Revolution.

The game development model which is used for PlayStation 2, where a few
programmers work directly with the low level code to create libraries for
specific functions and other developers simply use those libraries, masking
the complexity of the underlying system, is likely to work just as well on
PlayStation 3, while the prevalence of middleware such as Criterion's
RenderWare or the Havok physics engine will also make the transition less
painful.

Another factor fingered by developers is the fact that Sony's PlayStation
Portable libraries and documentation have been widely praised by those
working on the system, indicating that Sony has learned an important lesson
from the PS2 launch - where much of the development difficulty lay not with
the system itself, but with poorly translated (or un-translated)
documentation and difficult to use libraries.

Along with the Cell processors, the PlayStation 3 is also set to use a
graphics chipset from NVIDIA, which will be based on the company's next
generation of GPU, following on from the hugely successful 6000 series of PC
graphics cards.
____________________________________________________________________________
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