John Bowers of UCSB is a collaborator of mine...we're on the Intra-Chip
Optical Networks (ICON) team in the DARPA UNIQ program. He's a very
smart guy who knows his stuff, and this is a pretty nice piece of work.
However, he's not the one doing all the heavy breathing--it looks like
the Intel hype machine is what's behind that. (Those Intel hype guys
are _good_--better than the technology people, that's for sure.)
The gee-whiz terabit numbers are assuming things like 40 Gb/s per
wavelength, with 50 wavelengths per line, which isn't impossible at all.
The idea is that one 'wire' can pass many full-speed logic signals
simultaneously, which is a big win. You don't need terahertz logic
speeds to do this, which is a good thing since we're not going to have
terahertz logic speeds, ever.
You need a transistor f_max at least 10 times the logic speed, and you
can't make transistors with f_max of 20 THz. This is because the
maximum frequency that signals can propagate in a semiconductor is
proportional to the square root of the carrier density. The same is
true in plasmas, which is why this limit is called the 'plasma
frequency.' You can't dope semiconductors enough to get the plasma
frequency higher than 10-30 THz, so you can't make 20 THz transistors,
so you can't make 2 THz logic out of transistors. Not to mention that
at that speed, the region of the chip you can keep synchronous is about
30 microns square, on optimistic assumptions.
It's very helpful to have optical gain in all-photonic ICs, and these
InP-based devices may turn out to be an important part of the tool kit.
Wire is so much easier to make than these optical gizmos that we have
to have a really amazing advantage in real computer performance before
the chip guys will even talk to us. (I'd feel the same in their shoes.)
Fortunately it looks like we can do that.
Cheers,
Phil Hobbs
