Please help with dead system

  • Thread starter Thread starter Chris
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Since your information is wrong, I don't feel I have to proof
anything.

Yes, you do.
But please remain unenlightened, if you want.

Otherwise have a look at the schematics again. Should be at least PC-AT,
since I think the original PC and XT actually could not do this AFAIK.

Arno

I have the original IBM PC/AT Technical Reference Manual.

Here are scans of the relevant circuits:
http://www.users.on.net/~fzabkar/PC-AT/

Note that the speaker is driven by an 8254 timer gated with speaker
data from "Port B", ie I/O port 61h.

There is no connection between the 8042 keyboard controller and the
speaker.

- Franc Zabkar
 
In comp.sys.ibm.pc.hardware.misc Franc Zabkar said:
On 17 Nov 2006 23:54:02 GMT, Arno Wagner <[email protected]> put finger
to keyboard and composed:
Yes, you do.
I have the original IBM PC/AT Technical Reference Manual.
Here are scans of the relevant circuits:
http://www.users.on.net/~fzabkar/PC-AT/
Note that the speaker is driven by an 8254 timer gated with speaker
data from "Port B", ie I/O port 61h.
There is no connection between the 8042 keyboard controller and the
speaker.

Ok, so you did actually look. In my PC-AT schematics, I/O D1 from
the 8042 (U126) is connected to the Speaker via U127 (ALS175,
a quad D-Flip flop) and mixed together with the output of the 8254
(U103) in U92. Yes, ordinarily the AND-gate acts as a gate. But it
can be used as mixer as well, if the signal from the 8254 is "1".

Arno
 
Ok, so you did actually look. In my PC-AT schematics, I/O D1 from
the 8042 (U126) is connected to the Speaker via U127 (ALS175,
a quad D-Flip flop) and mixed together with the output of the 8254
(U103) in U92. Yes, ordinarily the AND-gate acts as a gate. But it
can be used as mixer as well, if the signal from the 8254 is "1".

Arno

Look again. I/O D1 from the 8042 is connected to a shared data bus.
This data bus is controlled by the host CPU, not the 8042. In any case
the clock for U127 is "-PortB WR" which is also generated by the host
CPU via an Out instruction to port 61h. The 8042 has *no way* of
clocking data through U127.

Page 1-30 of the manual states:

=====================================================================
The system unit has a 2-1/4 inch permanent-magnet speaker which can be
drive from:

. The I/O-port output bit
. The timer/counter's clock out
. Both
=====================================================================

Page 1-10 has a simplified circuit diagram which may be easier for you
to understand:
http://www.users.on.net/~fzabkar/PC-AT/TimerCounter.jpg

- Franc Zabkar
 
If it's just a single LED, then that's a lot easier than generating a
beep code.

It's a set of 4 dual colour (red/green) LED so it's a bit more
complicated than just lighting up one LED if the board doesn't see a
CPU?

Wouldn't it be possible that the chipset has included "intelligence"
to be used for controlling the speaker or such a diagnostic function?

I'll try to see if anybody I know has a spare system and willing to
try a little test by pulling out the CPU totally. :p
 
It's a set of 4 dual colour (red/green) LED so it's a bit more
complicated than just lighting up one LED if the board doesn't see a
CPU?

I suspect that these 4 dual-colour LEDs code for 8 data bits at
diagnostic port 80h, in which case they would be controlled by the
host CPU.

I'm not sure if the following will work, but I'd try accessing your
LEDs using DOS Debug.

For example, to turn all LEDs on, off, alternating on/off, type ...

debug
-O 80 FF (O = oh, not zero)
-O 80 0
-O 80 55
-O 80 AA
-Q
Wouldn't it be possible that the chipset has included "intelligence"
to be used for controlling the speaker or such a diagnostic function?

I guess some *rudimentary* diagnostic might make sense, but POST
functions require an X86 CPU and BIOS code.
I'll try to see if anybody I know has a spare system and willing to
try a little test by pulling out the CPU totally. :p

If you can't find anybody, I'll post a follow-up to
alt.comp.hardware.homebuilt. Those people seem to have more practical
experience.

- Franc Zabkar
 
It's a set of 4 dual colour (red/green) LED so it's a bit more
complicated than just lighting up one LED if the board doesn't see a
CPU?

Wouldn't it be possible that the chipset has included "intelligence"
to be used for controlling the speaker or such a diagnostic function?

I'll try to see if anybody I know has a spare system and willing to
try a little test by pulling out the CPU totally. :p

You don't even have to pull the cpu to make the whole thing
unresponsive. A few weeks ago I grabbed an IBM T40 off a junk pile at
work - cracked LCD, because of that it was stripped of RAM and
discarded. It was totally unresponsive (no beeps, nothing at all)
until I put in a SODIMM. Then it worked well with external monitor,
and last week I replaced LCD. However the fact is that if you pull
just the memory, it's braindead, despite the fact that it has 1MB
cache on the CPU, and DOS needed what? "640k enough for anyone" - Bill
Gates ;)))))))))))))

NNN
 
In comp.sys.ibm.pc.hardware.misc Franc Zabkar said:
On 18 Nov 2006 02:38:27 GMT, Arno Wagner <[email protected]> put finger
to keyboard and composed:
Look again. I/O D1 from the 8042 is connected to a shared data bus.
This data bus is controlled by the host CPU, not the 8042.

No. This is a Tri-State bus and (given the right arbitration)
every device can write to it.
In any case
the clock for U127 is "-PortB WR" which is also generated by the host
CPU via an Out instruction to port 61h. The 8042 has *no way* of
clocking data through U127.

You have no way of knowing this. The 8042 may be able to write to 61h.
Don't forget that this is the I/O bus, not the normal CPU memory
bus.

However, given that some data is missing, e.g. the PROM data,
I don't know.
Page 1-30 of the manual states:
=====================================================================
The system unit has a 2-1/4 inch permanent-magnet speaker which can be
drive from:
. The I/O-port output bit
. The timer/counter's clock out
. Both
=====================================================================
Page 1-10 has a simplified circuit diagram which may be easier for you
to understand:
http://www.users.on.net/~fzabkar/PC-AT/TimerCounter.jpg

Sorry, don't need that and please can your arrogance.

Arno
 
Ok, whether or not the original IBM AT could beek a "CPU missing" is
really besides the point. More important is what amodern PC mainboard
would do. In order to find out, I just hookes an EPOX EP8-KRA2+
up to a PSU and speaker. This board also has a POST display,
which hung at "FF" as expected. In addition there were no beeps,
so I retract my earlier statement: A modern mainboard does
not necessarily beep when the CPU is missing.

Arno
 
No. This is a Tri-State bus and (given the right arbitration)
every device can write to it.

Every device *may* be able to write to the bus and in so doing
exchange data with the host CPU, but not every device can write to
every *other* device.
You have no way of knowing this. The 8042 may be able to write to 61h.

The 8042 *does not* control the data bus. In fact there are 14 pages
which describe in detail what the keyboard controller actually does.
These pages also contain an additional simplified functional diagram.
Don't forget that this is the I/O bus, not the normal CPU memory
bus.

The I/O bus is derived from the host CPU's data bus. The "-PortB WR"
clock signal is derived from the CPU's M/IO* pin. See pages 1,2,15,
and 18 of your own copy of the schematics.
However, given that some data is missing, e.g. the PROM data,
I don't know.





Sorry, don't need that and please can your arrogance.

Pot kettle black.

"Since your information is wrong, I don't feel I have to proof
anything. But please remain unenlightened, if you want."

- Franc Zabkar
 
Just to be clear, you don't mean *all* the POST beep codes, do you?

To tell you the truth, I'm not sure, since systems pretty much only
give ONE error code even if more than one error occurs. If the CPU is
not detected, it gives ONLY the "CPU not found" error, even if there
are other problems (eg. memory not detected). Different errors occur
at different stages and it also varies from one board to the next. I'm
sure that SOME errors require CPU intervention. Just as an example,
on an Athlon64/Opteron system it almost certainly won't be possible to
detect if the memory exists or not if the CPU is not present given
that the memory controller is on the CPU.

Still I would say that many beep codes are handled totally
independently of the processor. Certainly the "CPU Not detected" is,
and same for "power supply overloaded". Others like "CPU fan not
detected" are also probably independent of the processor. Obviously
all of this is highly dependent on the individual BIOS and chipset of
the system board.
 
Proof please. The beep codes are generated from the 8254 timer chip, which
must be programmed by the processor. If the processor is missing or cannot
do code/data fetches from the BIOS ROM, there are *no* post codes. Period.

That is definitely false. I have pretty extensive experience on HP's
Business Desktop line, and every one of them will give you a beep code
(3 beeps) if there is no processor installed in the system. See page
A-13 from the following document:

http://h20000.www2.hp.com/bizsuppor...support/SupportManual/c00368814/c00368814.pdf


Dell has a similar code for their new Dimensions, where only light 3
of their diagnostics lights is on:

http://support.dell.com/support/edocs/systems/dimC521/en/SM_EN/tshoot.htm#wp1064555


Note that these codes are NOT generated by any "8254 timer chip" as
such chips haven't existed on motherboards for 10+ years now. The
functionality of the 8254 timer chip has been incorporated into the
motherboard chipset, typically in the I/O controller or southbridge.
This is also where the "Keyboard MCU" resides and it's also where the
POST beeps (or blinking lights, or voice warnings on some new systems)
come from.

This is not some XT or AT system we're talking about here, things have
changed quite a bit in the past 25 years.
 
In comp.sys.ibm.pc.hardware.misc Franc Zabkar said:
On 18 Nov 2006 21:19:53 GMT, Arno Wagner <[email protected]> put finger
to keyboard and composed:
Every device *may* be able to write to the bus and in so doing
exchange data with the host CPU, but not every device can write to
every *other* device.

Yes, and actually most cannot, since the address lines and
handshaking lines are pure inputs. For the 8042 this is not true.
It has general purpose I/O and just pretends to be a
memory-mapped I/O device.
The 8042 *does not* control the data bus. In fact there are 14 pages
which describe in detail what the keyboard controller actually does.
These pages also contain an additional simplified functional diagram.

The 8042 can do a lot of things not in the normal operation description.
For example, it can control any signal deliverd to it.
The I/O bus is derived from the host CPU's data bus. The "-PortB WR"
clock signal is derived from the CPU's M/IO* pin. See pages 1,2,15,
and 18 of your own copy of the schematics.

Well. I think this discussion has reached the end of its usefulness.
See my other posting.
Pot kettle black.
"Since your information is wrong, I don't feel I have to proof
anything. But please remain unenlightened, if you want."

Look one posting further up....

Arno
 
In comp.sys.ibm.pc.hardware.misc Franc Zabkar said:
On 18 Nov 2006 21:19:53 GMT, Arno Wagner <[email protected]> put finger
to keyboard and composed:

P.S.: See the posting from Tony Hill for an example of a system that
does beep "no CPU". Also I agree with him, that the state of the art is
more important than the historic discussion.

Arno
 
That is definitely false. I have pretty extensive experience on HP's
Business Desktop line, and every one of them will give you a beep code
(3 beeps) if there is no processor installed in the system. See page
A-13 from the following document:


Dell has a similar code for their new Dimensions, where only light 3
of their diagnostics lights is on:


Note that these codes are NOT generated by any "8254 timer chip" as
such chips haven't existed on motherboards for 10+ years now. The
functionality of the 8254 timer chip has been incorporated into the
motherboard chipset, typically in the I/O controller or southbridge.
This is also where the "Keyboard MCU" resides and it's also where the
POST beeps (or blinking lights, or voice warnings on some new systems)
come from.
This is not some XT or AT system we're talking about here, things have
changed quite a bit in the past 25 years.

I agree to that. See my other posting were I describe that a
board with VIA chip from Epox does not sugnal anything if
the CPU is missing.

I guess today it just depends on the individual board. Also
anything done before the BIOS starts executing (which requires
the CPU to be present and working), is up to the board
manufacturer anyways.

Arno
 
That is definitely false. I have pretty extensive experience on HP's
Business Desktop line, and every one of them will give you a beep code
(3 beeps) if there is no processor installed in the system. See page
A-13 from the following document:

http://h20000.www2.hp.com/bizsuppor...support/SupportManual/c00368814/c00368814.pdf

Hmmm, "Processor not installed" seems unambiguous to me. However,
AFAICS, the higher level diagnostic tests definitely require a
functioning x86 CPU and BIOS code.
Dell has a similar code for their new Dimensions, where only light 3
of their diagnostics lights is on:

http://support.dell.com/support/edocs/systems/dimC521/en/SM_EN/tshoot.htm#wp1064555

That could still require a partially functioning CPU. Obviously all
the other tests require a functioning x86 CPU and BIOS code.

In fact test #1 in the BIOS POST routines of the original IBM AT was a
rudimentary CPU test. The program listing (yes, the Tech Ref Manual
lists the complete BIOS assembly code) states that test #1 writes 01
to the diagnostic port at 80h, and then tests the CPU's flags and
registers. If an error is detected, the test jumps to an error
handling routine consisting of a single instruction, HLT. There are no
beeps, no blinking lights. I suspect that the LEDs in your Dell
example are connected to port 80h, rather than to some special
hardware, in which case you could drive them using the Debug example
in my other post.
Note that these codes are NOT generated by any "8254 timer chip" as
such chips haven't existed on motherboards for 10+ years now.

That's irrelevant. In fact chipsets that incorporated the
functionality of the 8254 timer were introduced in early 286
motherboards (eg VLSI Tech, Chips & Tech) way back in the early 90s.
But that doesn't change the fact that the speaker is driven from a
piece of silicon that emulates the functionality of the original
discrete 8254 chips. And that's what matters. If you are a Windows
user, any version of Windows, check you Device Manager I/O resource
list. You will find a speaker port at 61h and a system timer port at
40-43h, exactly where they have always been.
The
functionality of the 8254 timer chip has been incorporated into the
motherboard chipset, typically in the I/O controller or southbridge.
This is also where the "Keyboard MCU" resides and it's also where the
POST beeps (or blinking lights, or voice warnings on some new systems)
come from.

Agreed, but that does not prove that the keyboard MCU is doing the
talking. On the contrary it is obvious that certain POST routines
*must* be executed by the host CPU from BIOS code. For example, a ROM
checksum test, or a memory test, or a test for the presence of a
graphics adapter all require x86 intelligence.
This is not some XT or AT system we're talking about here, things have
changed quite a bit in the past 25 years.

Yes they have, but not the way you think. The fundamentals are still
there.

- Franc Zabkar
 
Yes, and actually most cannot, since the address lines and
handshaking lines are pure inputs. For the 8042 this is not true.
It has general purpose I/O and just pretends to be a
memory-mapped I/O device.

Technobabble. The 8042 does not control the data bus. Period.
The 8042 can do a lot of things not in the normal operation description.
For example, it can control any signal deliverd to it.

More technobabble. What an 8042 MCU can do in another application is
completely irrelevant. In a PC/AT the 8042 is just another I/O device.
It doesn't do DMA or bus mastering or anything exotic. It just does
what the host CPU tells it to do (via ports 60 and 64).
Well. I think this discussion has reached the end of its usefulness.
See my other posting.

There is nothing in that post which is relevant to the present
discussion. Instead I suggest you examine pages 1,2,15, and 18 of your
own copy of the schematics and follow the signal path from the host
CPU, to the I/O decoder, to the timer, and then on to the speaker. We
don't need to speculate, the proof is in the schematics. If you have
difficulty understanding them, I'll be happy to explain, unless of
course you think I'm being arrogant.

- Franc Zabkar
 
Since your information is wrong, I don't feel I have to proof
anything. But please remain unenlightened, if you want.
Suuuure...
*giggle*

Otherwise have a look at the schematics again. Should be at least PC-AT,

Yep. I still have my IBM PC AT technical reference manual. Pg. 16 of 22 of
the schematics. Looks like that pesky old 8254 needs programming to me.
All those beep codes referenced by different BIOS manufacturers require a
processor that can run well enough to do code and data fetches from ROM.
since I think the original PC and XT actually could not do this AFAIK.

I've been debugging to the component level on processor, memory, and I/O
boards since the 8080 days on Intel Multibus based systems, and you were
most likely still suckling at your dad's teat, you confused pinhead. Why
don't you quit while you're behind?
 
Ok, whether or not the original IBM AT could beek a "CPU missing" is
really besides the point. More important is what amodern PC mainboard
would do. In order to find out, I just hookes an EPOX EP8-KRA2+
up to a PSU and speaker. This board also has a POST display,
which hung at "FF" as expected. In addition there were no beeps,
so I retract my earlier statement: A modern mainboard does
not necessarily beep when the CPU is missing.

I expect an apology is forthcoming?
 
That is definitely false. I have pretty extensive experience on HP's
Business Desktop line, and every one of them will give you a beep code
(3 beeps) if there is no processor installed in the system. See page
A-13 from the following document:

http://h20000.www2.hp.com/bizsuppor...support/SupportManual/c00368814/c00368814.pdf

I'd be curious to see a schematic of this motherboard, most likely it's a
simple watch dog timer which is triggered after a certain period of bus
inactivity. These are not the beep codes as referenced by the BIOS
manufacturers.
In any case, the OP in this thread's system is not an HP desktop it is a
homebuilt, and will not output POST beep codes if no CPU is present.
Dell has a similar code for their new Dimensions, where only light 3
of their diagnostics lights is on:

http://support.dell.com/support/edocs/systems/dimC521/en/SM_EN/tshoot.htm#wp1064555

Irrelevant to the discussion, as there are no "beep codes" for a missing
CPU chip. Additionally, that LED code is probably generated by default at
power up. You could pry the chipset off the board with a big old
screwdriver, AND have a fully functioning CPU and get the same result.
Note that these codes are NOT generated by any "8254 timer chip" as
such chips haven't existed on motherboards for 10+ years now. The
functionality of the 8254 timer chip has been incorporated into the
motherboard chipset, typically in the I/O controller or southbridge.

[rolls eyes]

In other words, it is generated from an 8254. Whether or not it's buried
deep within the chipset matters not. There is still a device which behaves
and acts exactly like an 8254 - three programmable timers with numerous
modes of operation, and each MUST be programmed by the CPU before it will
do anything at all.
This is also where the "Keyboard MCU" resides and it's also where the
POST beeps (or blinking lights, or voice warnings on some new systems)
come from.

I've yet to see a design where the keyboard controller can write data to
the speaker.
This is not some XT or AT system we're talking about here, things have
changed quite a bit in the past 25 years.

Yet still there is a 100% software compatible 8254 device deep within. I
never stated there was a discrete 24 pin DIP device for the function.

From the 82801DB technical reference .pdf dated May 2003:

"The ICH4 contains three counters which have fixed uses. All registers and
functions associated with the 8254 timers are in the core well. The 8254
unit is clocked by a 14.31818 MHz clock."


You sig delimiter is improperly constructed.
 
Still I would say that many beep codes are handled totally
independently of the processor. Certainly the "CPU Not detected" is,
and same for "power supply overloaded".

Funny, I don't have a single motherboard in-house that will do beep codes
if no CPU is present. These range from old socket 7 PICMG to modern i945
based core 2 ATX systems. From VIA mini ITX C3 and C7 to Pentium M 5.25"
embedded boards.

Not a Single ****ing One.

Also from the 82801DB reference manual:

"Speaker: The SPKR signal is the output of counter 2 and is internally
“ANDed” with Port 61h bit 1 to provide Speaker Data Enable. This signal
drives an external speaker driver device, which in turn drives the system
speaker. Upon PCIRST#, its output state is 0. NOTE: SPKR is sampled at the
rising edge of PWROK as a functional strap. See Section 2.20.1 for more
details."

Looking an old dual Pentium 2 reference design schematic from Intel
http://www.intel.com/design/chipsets/designex/gxdgsch.pdf
I see the 82371EB device that drives the speaker through a 2N3904
transistor. If you like, drag up the .pdf for the chipset and see for
yourself on pages 18 and 32.
Others like "CPU fan not
detected" are also probably independent of the processor.

Please elaborate.
Obviously
all of this is highly dependent on the individual BIOS and chipset of
the system board.

If there is no CPU then the BIOS is completely irrelevant, as there will
be no code or data fetches from ROM.
 
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