Xbox 2 Hardware Architecture Revealed

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Combaticon

Yeah, *three* duel-core IBM PowerPC 976 (or derivative of) CPUs !

can process 6 threads simultaneously.

awesome!


http://news.teamxbox.com/xbox/5728/Xbox-2-Hardware-Architecture-Revealed

===============================================================================
Xbox 2 Hardware Architecture Revealed?
By: César A. Berardini - "Cesar"
Apr. 26th, 2004 11:20 am


A chinese forum visitor has posted what it seems like leaked stuff
straight from Microsoft. He claims to has obtained the documents from
this site. It could be all fake but this diagram does no other thing
that confirm the previous stuff TeamXbox revealed first, as a world
exclusive.

Xbox 2 will be powered by three processors made by IBM, based on the
PowerPC 976 --the first dual-core 97x chip based on IBM's 64-bit
POWER5 architecture. Each processor is capable of processing two
threads, thus meaning the whole system can process six threads
simultaneously. These processors will also be the first PowerPCs built
on a 65nm process.

The graphic chip provided by ATI will contain not only a graphics
rendering core but up to 10 MB of embedded DRAM acting as a frame
buffer. This solution will finally make possible HDTV visuals with
full screen Anti-Aliasing on.

http://www.tinyurl.com/2nw75

The graphic chip will be fully compatible with DirectX 9's PS and VS
3.0 and the next version of DirectX: DX10 that includes some features
such as unified VS & PS model, virtual video memory which allows
DirectX 10 to claim an "unlimited resources" feature. That sounds like
too much power!

We contacted a Microsoft spokeman who simply told us: "Microsoft does
not comment on rumors or speculation."

We'll have more on this supposed leake docs soon. Stay tuned. Thanks
Xbit Labs for the head-ups.
===============================================================================

Hopefully they'll increase the memory by 2-fold by the time Xbox 2
ships.
 
3 (6) dual core processors? Isn't there a reason processors are usually in
1, 2, 4, 8, etc... configurations. Seems a little strange that the Xbox 2
would have some advancement beyond what they would uses for servers (seems a
little contrived to me). Has anybody heard of a chipset designed to handle
such an unusual number of processors?

If anybody has any insight into multi-processing that could explain this,
please feel free to enlighten me.

bye, Rick
 
Rick said:
3 (6) dual core processors? Isn't there a reason processors are usually in
1, 2, 4, 8, etc... configurations. Seems a little strange that the Xbox 2
would have some advancement beyond what they would uses for servers (seems a
little contrived to me). Has anybody heard of a chipset designed to handle
such an unusual number of processors?

If anybody has any insight into multi-processing that could explain this,
please feel free to enlighten me.

I was thinking something more mundane... Four large chips (1 GPU + 3 CPUs)
are laid out pretty logically on a board, especially in a cramped enclosure
like a console.

Twelve threads (3x2x2) seems like serious overkill, especially when the
graphics has a dedicated chip. Depending on what clock speed and process
size the PPC976s come in at, the Xbox2 should be an impressive beast. HPCC
anyone?

How exactly MS, IBM, and ATI will get all this silicon down to console price
levels mystifies me. Even following Moore's Law, the number of transistors
in Xbox2 dictates a hefty production cost in 2005 or even 2006.

S
 
is this really news?

I could have sworn I heard this last year...

triple g5s...

should be plenty of computational horsepower (XNA with real-time deformation
must be intense)...

hopefully they can emulate for backwards compatability...
 
Khee Mao said:
is this really news?

I could have sworn I heard this last year...

triple g5s...

Yes, that was the rumor last year, but that's not what was just leaked.

The Xbox2 will supposedly have three PPC976 chips, aka G6 Extreme; the G5 is
a PPC970. For those not paying attention, the PPC976 is a Power5 derivative
with dual cores and SMT, which should be 2-4x as fast per clock as a PPC970.
should be plenty of computational horsepower (XNA with real-time deformation
must be intense)...

hopefully they can emulate for backwards compatability...

With all those MIPS available, emulating a single Celeron should be trivial.

S
 
With all those MIPS available, emulating a single Celeron should be trivial.
It's actually a Pentium III not a Celeron. Of course that doesn't really
matter, whatever will emulate a 733MHz P3 will emulate a 733MHz Celeron and
vice versa
 
Stephen Sprunk said:
Twelve threads (3x2x2) seems like serious overkill, especially when the
graphics has a dedicated chip. Depending on what clock speed and process
size the PPC976s come in at, the Xbox2 should be an impressive beast. HPCC
anyone?


That site claims they are clocked at "3.5 GHz+". If IBM had processors
like that to sell cheaply enough to go in Xbox2 in 18 months, even with
Microsoft not caring how much money they lose on that business (lost
another nine digit number on Xbox last quarter) then I don't know if
Sony is in trouble but Itanium sure would be! If something like that
existed, Itanium would lose the one market it is showing a small measure
of success in.

While I doubt those specs, just like I doubt some of the higher end specs
bandied about for Sony's Cell, I have to wonder what it would do to
Itanium's HPC market if a CPU (or even GPU) used in consoles was able to
undercut Itanium's price/performance in HPC by an order of magnitude
simply due to the massive volumes consoles generate? I don't know how
much money Sony is spending on Cell, but if it isn't more than what
Intel spends on Itanium, it is surely more than about anyone else spends.
And while Itanium will be lucky to ever sell more than a million a year,
Cell and perhaps the Xbox2 CPU will be selling a million a month.

In the 90s we had the attack of the killer micros. Could this be the
decade for the attack of the killer consoles?
 
Xbox 2 will be powered by three processors made by IBM, based on the
PowerPC 976 --the first dual-core 97x chip based on IBM's 64-bit
POWER5 architecture. Each processor is capable of processing two
threads, thus meaning the whole system can process six threads
simultaneously. These processors will also be the first PowerPCs built
on a 65nm process.

The POWER 5 has SMT, so a dual core would be capable of 4 threads.
 
Perfect said:
It's actually a Pentium III not a Celeron. Of course that doesn't really
matter, whatever will emulate a 733MHz P3 will emulate a 733MHz Celeron and
vice versa

Heh. This old topic--couldn't resist. It's a PIII with 1/2 the level 1 and
1/2 the level 2 cache. ie. a Celeron by definition, but not by name. I
guess if you're making unicycles, and I'm making "bikes with 1 wheel",
they're not necessarily the same thing. Mine still has certain instruction
sets. I mean, handlebars. :-)
 
In comp.arch Rick said:
3 (6) dual core processors? Isn't there a reason processors are usually in
1, 2, 4, 8, etc... configurations. Seems a little strange that the Xbox 2

Usualy, no, there isn't a reason. many systems are perfectly happy with
odd numbers, even if teh usual is something along the lines of 2xN or
4xN.
would have some advancement beyond what they would uses for servers (seems a
little contrived to me). Has anybody heard of a chipset designed to handle
such an unusual number of processors?

Uhh, what do you think happens if you leave one of the processor slots unfilled
in a quad system (or even omit the slot)?
 
Yes, that was the rumor last year, but that's not what was just leaked.

The Xbox2 will supposedly have three PPC976 chips, aka G6 Extreme; the G5 is
a PPC970. For those not paying attention, the PPC976 is a Power5 derivative
with dual cores and SMT, which should be 2-4x as fast per clock as a PPC970.

Nothing new really then, they are just choosing a newer version of the
CPU. As for speed I heard 1.5Ghz not 3.5Ghz.
With all those MIPS available, emulating a single Celeron should be trivial.

ARRRGG its not emulating a fooking CPU thats the problem. That is
piss. Its emulating the GPU that is the problem. And don't say "its
just Direct X" cos its not. ATI getting a licence to emulate the
NVidia architecture will be a big problem. Yes its not just emulating
a set of micro code instructions, its the memory achitecture too. I
would expect at least $100 to the cost of each unit sold for the
emulation. The R&D for that will run into millions.
 
The diagram at <http://www.tinyurl.com/2nw75> show a chip with 3 CPU cores
and a shared L2 cache. The link is from the original post.

Thanks for the dose of realism!
This sounds much more likely. I could never believe a three CPU system
could be kept to the O($200) console price point. The 1MB L2 is tiny,
though the bandwidth is certainly high.
Best,
Peter
 
Leon Dexter said:
"Perfect" <PBC> wrote in message news:[email protected]...

Heh. This old topic--couldn't resist.

I understand, can't blame you. That's why I jumped in.
It's a PIII with 1/2 the level 1 and
1/2 the level 2 cache. ie. a Celeron by definition, but not by name.


Actually it really is a Pentium III and not a Celeron...this was verified by
Anandtech

"The CPU that powers the Xbox is a Coppermine based Pentium III with only
128KB L2 cache. While this would make many think that the processor is
indeed a Celeron, one of the key performance factors of the Pentium III that
is lost in the Celeron core was left intact for this core. The Coppermine
core was left with an 8-way set associative L2 cache instead of the 4-way
set associative cache of the Celeron. Based on what we've seen with the
Coppermine and Coppermine128 (Celeron) cores we estimate that the 8-way set
associative L2 cache gives this particular core a 10% performance advantage
over the Coppermine128 core of the Celeron."

http://www.anandtech.com/systems/showdoc.html?i=1561&p=2
 
Peter said:
Thanks for the dose of realism!
This sounds much more likely. I could never believe a three CPU system
could be kept to the O($200) console price point. The 1MB L2 is tiny,
though the bandwidth is certainly high.

The heat to be expected from 3 3.5 GHz cores still seems high. However, the
memory latencies hint at significant slippage of latencies (throughout),
allowing use of higher Vt transistors (than otherwise). I interpret the
Icache latency to be the length of the branch predict recurrence, otherwise
it would just be too awful. The reduction of the Icache from 64 KB to 32 KB
could be the preferable alternative to another clock of slippage.

If IBM is going to resplit the pipeline, I suspect it will happen at the
POWER5 to POWER5+ transition. The lite version of the latter would then be
ready for 65 nm.

If the diagram is bogus, there could be another explanation for the 3 G5's
in Xbox2 flavor of rumor: Altivec2 is rumored to have a 4x DP pipe in
addition to a 8x SP pipe, giving it 3x the vector FLOP/clock of a G5.
 
Actually it really is a Pentium III and not a Celeron...this was verified by
Anandtech

"The CPU that powers the Xbox is a Coppermine based Pentium III with only
128KB L2 cache. While this would make many think that the processor is
indeed a Celeron, one of the key performance factors of the Pentium III that
is lost in the Celeron core was left intact for this core. The Coppermine
core was left with an 8-way set associative L2 cache instead of the 4-way
set associative cache of the Celeron. Based on what we've seen with the
Coppermine and Coppermine128 (Celeron) cores we estimate that the 8-way set
associative L2 cache gives this particular core a 10% performance advantage
over the Coppermine128 core of the Celeron."

http://www.anandtech.com/systems/showdoc.html?i=1561&p=2

Whoa! That's some BAD guesstimating by Anandtech! They're usually
more reliable than that! Going from 4-way set associative to 8-way
associative is NOT going to give you a 10% performance advantage
unless you REALLY try to make your code suffer on the 4-way
associative chip. It's probably more like a 1% difference, certainly
small enough to be ignored for all practical purposes.

In either case, the chip in the XBox is neither a PIII or a Celeron,
in that there was never any chip with that exact configuration sold.
It is, however, sort of a mix of the two. Basically you can look at
it either as a Celeron with a 133MHz bus speed or a PIII with only
128K of cache... or more accurately simply as the XBox processor.
 
Tony Hill said:
Whoa! That's some BAD guesstimating by Anandtech! They're usually
more reliable than that! Going from 4-way set associative to 8-way
associative is NOT going to give you a 10% performance advantage
unless you REALLY try to make your code suffer on the 4-way
associative chip. It's probably more like a 1% difference, certainly
small enough to be ignored for all practical purposes.

My athlon xp has 16-way L2 (cpu-z v1.20).
I think for 'objects' aligned on cache line borders(textures, vectors) it
could proove as a nice load off (in worst case scenario in 2-way associative
you could end up using one 64 byte line (out of xxxKB) if all objects fall
on the specific address index), or so the Randall Hyde in his AoA book says.
 
Hi Bagpuss,
I want to know how to post my own sigature with the message automatically.
Thanks
 
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