What "Parallel Hz" Really Is

  • Thread starter Thread starter Radium
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R

Radium

Hi:

Below is an example of "parallel hz"

http://img56.imageshack.us/my.php?image=clocksignalexample8is.gif

If each clock signal is 1 hz, and you have a billion of them, staggered
such that every 1ns part of the CPU can start, and finish, an
instruction - making the effective 'clock rate' 1 Ghz.

There is no real benefit to using a billion 1 hz clocks to make a clock
rate of 1Ghz and setting up such a system would be a large mess to CPU
designers. However, I find it fun to think about.


Regards,

Radium
 
Radium said:
Hi:

Below is an example of "parallel hz"

http://img56.imageshack.us/my.php?image=clocksignalexample8is.gif

If each clock signal is 1 hz, and you have a billion of them, staggered
such that every 1ns part of the CPU can start, and finish, an
instruction - making the effective 'clock rate' 1 Ghz.

There is no real benefit to using a billion 1 hz clocks to make a clock
rate of 1Ghz and setting up such a system would be a large mess to CPU
designers. However, I find it fun to think about.


Regards,

Radium
Click to expand...

The image can be safely seen here, and is hardly worth the effort:

http://img56.imageshack.us/img56/2427/clocksignalexample8is.gif

Using the OPs link above crashed my browser. Naughty boy.
Shields up.

Paul
 
Hi:

Below is an example of "parallel hz"

http://img56.imageshack.us/my.php?image=clocksignalexample8is.gif

If each clock signal is 1 hz, and you have a billion of them, staggered
such that every 1ns part of the CPU can start, and finish, an
instruction - making the effective 'clock rate' 1 Ghz.

There is no real benefit to using a billion 1 hz clocks to make a clock
rate of 1Ghz and setting up such a system would be a large mess to CPU
designers. However, I find it fun to think about.
Click to expand...


Fun or just silly?

It's about as much fun as having 500 cans of beer with only
half a sip in each.
 
kony said:
Fun or just silly?

It's about as much fun as having 500 cans of beer with only
half a sip in each.
Click to expand...

It's silly in the quantities he mentioned but the technique is already in
use, on a more practical scale.
 
I used that clocking scheme in an FPGA design years ago. I'm sure
others have also.
Click to expand...

There was a /. or Register note about 'Square Clocking' a few days ago:

Effectively running each quadrant of a chip 90 degrees out of phase from
the next, allowing electric power to rotate around the chip.

This would supposedly allow up 75% reduction in the total power budget,
which only makes sense if the process is nearly lossless.

Terje
 
It's silly in the quantities he mentioned but the technique is already in
use, on a more practical scale.
Click to expand...

I once built a "TV Typewriter" that used pipelining in the video data
path. :-)

Cheers!
Rich
 
Radium said:
Hi:

Below is an example of "parallel hz"

http://img56.imageshack.us/my.php?image=clocksignalexample8is.gif

If each clock signal is 1 hz, and you have a billion of them, staggered
such that every 1ns part of the CPU can start, and finish, an
instruction - making the effective 'clock rate' 1 Ghz.

There is no real benefit to using a billion 1 hz clocks to make a clock
rate of 1Ghz and setting up such a system would be a large mess to CPU
designers. However, I find it fun to think about.
Click to expand...

Not all problems can be paralelized. Most of the linear logic
type of problems are fundamentaly not paralelizeable.

The CPU you are talking about does exist. It is human brain.
Frequency 10 Hz, number of parallel units 10^10.

It works great for paralelizeable problems such as data-base
search and 3d navigation.
But it sucks at serial only problemes such as arithmetics and
boolean logic.

Regards,
Yevgen
 
Below is an example of "parallel hz"

http://img56.imageshack.us/my.php?image=clocksignalexample8is.gif

If each clock signal is 1 hz, and you have a billion of them, staggered
such that every 1ns part of the CPU can start, and finish, an
instruction - making the effective 'clock rate' 1 Ghz.

There is no real benefit to using a billion 1 hz clocks to make a clock
rate of 1Ghz and setting up such a system would be a large mess to CPU
designers. However, I find it fun to think about.
Click to expand...

Isn't this like taking double/quadruple pumped bus and pipelining to
the extreme?
 
Evgenij said:
Not all problems can be paralelized. Most of the linear logic
type of problems are fundamentaly not paralelizeable.

The CPU you are talking about does exist. It is human brain.
Frequency 10 Hz, number of parallel units 10^10.

It works great for paralelizeable problems such as data-base
search and 3d navigation.
But it sucks at serial only problemes such as arithmetics and
boolean logic.

Regards,
Yevgen
Click to expand...


In a "parallel Hz" device the bits maybe completely in serial and the
algorithms and tasks maybe totally non-parallelizable. However, the
frequency is still parallel.

The device I am proposing is completely serial except for the clock
rate.
 
The said:
Isn't this like taking double/quadruple pumped bus and pipelining to
the extreme?
Click to expand...

No. Not at all. As I said in another post, my proposed device is
completely serial except for the frequency. It uses "parallel hz" but
in terms of everything other than frequency, it is totally serial and
non-parallel. Only the clock rate is parallel.
 
: The CPU you are talking about does exist. It is human brain.
: Frequency 10 Hz, number of parallel units 10^10.

Brain brain!! What is brain??
<Star Trek, circa 1967>

HAHAHAHAHAHAHAHAHAHA!!

j.
 
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