Steve Thackery said:
Andrew, you've completely confused me.
Either you know the answer to your own question (or you think you do) - in
which case why ask it? Or you don't know the answer to your question, in
which case why reject everyone who offers help?
To be honest Steve, I expected this forum to be more of a
discussion/exposure forum which I am used to in terms of development. The
original argument being that my system crashes with 4GB of RAM. I'm quite
aware that properly developed arguments in forums are recognised by
developers of the software in question. This being Windows Vista. The grounds
of argument being a suitable rebutle to defend my simple request of
investigating an issue without doubt.
Even so, you've raised a really interesting point. If you have an XP system
with 4G of RAM, and it really and genuinely can see and use all of it, then
the "received wisdom" that memory-mapped I/O takes up some of that 4G in
Vista must be wrong. XP and Vista ought to work the same.
Correct
However, I'm prepared to bet that you are mistaken about your XP system.
Are you sure you understand the difference between the I/O address space and
the memory address space?
It is a fundamental, professional obligation of mine to understand the
difference.
The early Intel processors had an address bus and a data bus which went to
both the system RAM and the various I/O devices. A separate line (on the
8086 it's pin 28 - M/IO) signalled to the surrounding electronics whether
the processor was reading/writing to I/O space or memory space, and it
switched the chip enable signals appropriately.
Regardless of different types of archtechture, the goal has always been the
same. Differentiate between relevent buses via the use of an instruction set.
If the primative bus system was shared, it still remains that certain signals
on that bus accompanied by the address/data had a meaningfull obligation to
distribute the data/action to the appropriate destination at the discretion
of the CPU.
Memory addresses and I/O addresses are quite different, and you can instruct
the processor to read address $0100 in the I/O space, or address $0100 in
the memory space, and they are completely different.
Correct
You are right to say that I/O that sits in the I/O map doesn't clash or
overlap in any way with memory at the "same" address, because it isn't
really the "same" address at all - they are in completely different maps -
as signalled by that M/IO line.
And the data flow to each address exists on separate sub systems routed by
the CPU and goverened by the programme CPU instruction.
BUT - with your experience you MUST have come across the situation where I/O
sits in the normal MEMORY map, NOT the I/O map.
Don't think if RAM being mapped as the contents of memory generally contains
abstract data types and can only be intepreted by the programme accessing the
memory.
It is quite common at assembly level or even C to store I/O addresses in
memory. It is purely for the sake of functions to know where to send
information. Whether it be the I/O interrupt for video or sound etc. Take
note of the difference between RAM addresses and I/O interrupts.
This is the case with the
memory on the video card: it sits in the memory space, not the I/O space.
Whenever this occurs your address decoding hardware must disable the RAM
that occupies that same address, otherwise both the system RAM and the video
RAM will try to read/write to the bus at the same time.
Although the memory BITMAP generated by the OS exists in RAM, this does not
explain your estimation of 500MG. A typical high resolution display would be
1900x1200. Each pixel having 24bits of information padded out to 32 bits for
processing speed. The total screen bitmap would be roughly 8.7MB of RAM.
Although with some BIOS chipsets it is possible to assign RAM as texture
memory via the nForce co-processor in the event of a lack of texture memory
on the video card, the motherboard I am using does not. Take note that it
only involves texture memory and nothing else and only applies to 3D
applications.
I'm not sure where people get the idea that RAM addresses are reserved for
video card memory addresses as some type of easy by-pass method to write to
video RAM. As stated in another post of mine, all texture or pipeline data is
serialised on the PCI bus and the video card understands how to interpret the
information that has been coded by the video card drivers and parsed to the
CPU as an I/O instruction directed at the interrupt of the video hardware.
The usage of the word interrupt is essential as only a single instruction is
processed by the CPU at any one time. The use of hardware and software
interrupts are used to determine if the CPU is able to address a sub-system
at that point in time or if it has to wait till other sub-systems on the same
target bus are finished.
I'm sure you know this already, so why are you arguing about it?
Steve
As stated earlier, creating a cause for investigation without doubt. As
always, dicussions blow out into almost irrelevant tangents. Dispite any
knowledge that I may have, I am not the distributer of Windows Vista or a
developer of it. I'm simply creating a discussion about it and it is almost
certain that ignorance brings about solutions that I have already considered
myself and found to be not applicable. I am ignorant as to how I will get
around this problem which is why am here but I am not here to ask questions I
already know the answer to.