Question regarding RAM timing and latency

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Jack

I was looking at Corsair PC 3200 on the Newegg.com website. The CAS
latency instead of listed as CAS 2.5 or CAS 3, it was 2-3-3-6. Can
someone educate me on RAM timing and latency. Thanks.
 
Jack said:
I was looking at Corsair PC 3200 on the Newegg.com website. The CAS
latency instead of listed as CAS 2.5 or CAS 3, it was 2-3-3-6. Can
someone educate me on RAM timing and latency. Thanks.
Click to expand...

The first number is the CAS latency. In this case 2.

hope this helps
 
Howdy!

Jack said:
OK, what do the other digits mean? and what is RAM timing?
Click to expand...

In reverse order - it's the timing that the RAM needs to get
everything where it needs at the proper time. What, you think these things
run at 0 waits, no pauses? They don't ...

IIRC, that's CAS latency - first row - second row - subsequent rows.
And 2-3-3-6 isn't bad - I've seen 3-5-5-7 as "fast" RAM before.

RwP
 
Jack said:
OK, what do the other digits mean? and what is RAM timing?
Click to expand...

2=(CAS Latency)The number of clock cycles that pass from the column
being addressed to the data arriving in the output register. The
memory manufacturer lists the best possible setting as the CL rating.

3=(RAS-to-CAS Delay) Number of clock cycles that pass between the row
address being determined and the column address being sent out.

3=(RAS Precharge Time) Number of clock cycles needed to precharge the
circuits so that the row address can be determined.

6=(Row Active Time) Delay that results when two different rows in a
memory chip are addressed one after another.

memory timing is all of the above taken as a whole
 
2=(CAS Latency)The number of clock cycles that pass from the column
being addressed to the data arriving in the output register. The
memory manufacturer lists the best possible setting as the CL rating.

3=(RAS-to-CAS Delay) Number of clock cycles that pass between the row
address being determined and the column address being sent out.

3=(RAS Precharge Time) Number of clock cycles needed to precharge the
circuits so that the row address can be determined.

6=(Row Active Time) Delay that results when two different rows in a
memory chip are addressed one after another.

memory timing is all of the above taken as a whole
Click to expand...

Thanks for the explaination.
 
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