C
Chris Smith
Is PCIe and PCI 2.2 backwards compatible?
What is the bandwidth of these two technologies?
What is the bandwidth of these two technologies?
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P
Paul
"Chris Smith" said:Is PCIe and PCI 2.2 backwards compatible?
What is the bandwidth of these two technologies?
They are completely different animals. The connectors
are different.
PCI 2.2 is a parallel bus, in the same sense that IDE
ribbon cables are a parallel bus.
PCI Express is a serial bus, just like SATA is a serial
interconnect. PCI Express uses a bunch of these serial
busses, to get whatever amount of bandwidth is desired.
Up to x16 is used on current video card slots. The little
x1 PCI Express slots are good enough for things that
you would have connected to the PCI parallel bus in the
past.
Another difference, is the PCI bus is shared by a bunch
of cards. If you had an ATX sized desktop motherboard, the
five PCI slots (and maybe a peripheral chip or two on
the motherboard) all sit on the same PCI bus and share
the bandwidth. PCI Express, on the other hand, is point
to point. That means each slot connector on PCI Express
is independent of the other slots. The cards cannot
interfere with each other, like they could on the older
PCI parallel bus. (There can still be bandwidth bottlenecks
inside the chipset, which would be something to look for
when analyzing chipset internal architectures.)
The original PCI parallel bus starts at 33MHz x 32 bits,
or 133MB/sec. The clock rate and width of the bus increase
by factors of two, as there have been improvements to the
PCI parallel spec over the years. Server boards tend
to use some of the faster/wider versions of the PCI
parallel bus. Desktop boards are generally limited
to the 133MB/sec theoretical max, with the odd exceptions.
PCI Express x1 is 250MB/sec. Since there is a transmit
and a receive link, the bandwidth is actually 250MB/sec
in each direction. The actual differential wires on the
motherboard operate at 2500Mbit/sec, and that figure is
scaled by 8/10, which represents the coding overhead on
the link (I think it is something like an 8B10B code,
which is good if you want to AC couple a link). The usable
serial rate is 2000Mbit/sec, which divided by 8 gives
250MB/sec. A video card with a x16 interface has 4000MB/sec
in each direction.
People do not realize or appreciate just how high tech
PCI Express really is. It represents operation of the
wires at close to the practical limits of _simple_ signal
transmission on a four layer microstrip PCB. (Multilevel
signal transmission will allow faster rates, but the
silicon will be that much tougher to make.) It taxes
the ability of the silicon to make good quality signals.
Significant lab work and verification has to be done,
to ensure that customers never get to see "flaky links".
So far, what is "under the hood", has never been a public
issue, which is a testiment to the engineering effort
to this point. (But now that cheap add-in cards are just
entering the market, we'll see if the "bottom feeder"
companies can continue the good trend.) You can screw
around with the old PCI parallel bus a bit more, and get
away with it, as it is pretty slow technology by comparison.
http://en.wikipedia.org/wiki/Pci_express
Both the PCI parallel bus and PCI Express standards
are not free for download. Which means getting any
more detail (like how the coding works and the like),
requires that you buy the specs from pcisig.com .
HTH,
Paul
M
Mike Walsh
When the PCI bus first became inadequate is was mainly because of video. The AGP bus solved that problem. Later as SCSI devices became faster it became necessary to increase the speed of the PCI bus used in servers. Eventually a 64 bit bus running at 66 Mhz became common and is known as PCI-X, not to be confused with PCI express (PCI-e). Later the speed was increased to 100 Mhz. Now PCI-e is fast enough for video or a server with several high speed SCSI adapters.
K
kony
When the PCI bus first became inadequate is was mainly because
because of?
You must've forgotten to use the carrage return a few dozen
times again.
D
DaveW
No. They are NOT compatible.
E
Erick
His entire paragraph appeared for me. Check to make sure messages are
downloaded fully.
because of?
You must've forgotten to use the carrage return a few dozen
times again.
downloaded fully.
When the PCI bus first became inadequate is was mainly because
because of?
You must've forgotten to use the carrage return a few dozen
times again.
K
kony
His entire paragraph appeared for me. Check to make sure messages are
downloaded fully.
he formats his without line-wraps so whatever might've been
downloaded, was not where it should be, the equivalent of
taking a piece of paper and not stoping at the right margin,
just continuing to write until one has reached the end of
their desk and the pen falls off into the floor. Of course
he will argue we need to set our newsreaders differently,
but that's not true as only his lack formatting, the problem
is not on our end.