New idea for fast bus

  • Thread starter Thread starter Jon Slaughter
  • Start date Start date
J

Jon Slaughter

Not sure if this is the right group but oh well...

An idea to speed up busses. Take the PCI bus for example. It has 32-bit data
path. Lets increase it to 256-bit but group it into 8 sub-busses. Each
sub-bus acts as a PCI bus and a device can select which sub bus it wants. It
can be made backwards compatible by defaulting to one bus. Beyond that a
device can select multiple sub-busses to use. This allows a configurable
data-path and allows simultanous bus transactions(to some degree). It also
allows slow devices not to slow down the bus as much. It also allows for
somewhat arbitrarily increased sub-bus size.

In any case I just thought I'd mention it for future posterity. (and if
anyone knows that something like this already exists please let me know)
 
Jon said:
Not sure if this is the right group but oh well...

An idea to speed up busses. Take the PCI bus for example. It has 32-bit data
path. Lets increase it to 256-bit but group it into 8 sub-busses. Each
sub-bus acts as a PCI bus and a device can select which sub bus it wants. It
can be made backwards compatible by defaulting to one bus. Beyond that a
device can select multiple sub-busses to use. This allows a configurable
data-path and allows simultanous bus transactions(to some degree). It also
allows slow devices not to slow down the bus as much. It also allows for
somewhat arbitrarily increased sub-bus size.

In any case I just thought I'd mention it for future posterity. (and if
anyone knows that something like this already exists please let me know)
Click to expand...

Why not read up on PCI Express first ?

With PCI Express, you have 4GB/sec available when a full
sized connector is used, and the wiring is point to point
rather than being a shared bus. The bus also is configurable
to operate at less than full x16 bandwidth, by using lane counts
like x1, x2, x4, x8.

Paul
 
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