Memory bandwidth

  • Thread starter Thread starter tom
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tom

I'm interested in how the bandwidth of AMD Opteron works. Specific to
dual Opterons with dual core, I'd like to understand the details of how
the four cores can/should share memory bandwidth.

I'm considering use of a Tyan S2882-D motherboard. I think that will be
a good choice for my servers but want to assure myself (and others)
about the best way to manage four cores for best performance. (Running
Linux, will be using a 2.6 package with that hardware).

Thanks for any pointers to details on this topic..

Tom S.
 
I'm interested in how the bandwidth of AMD Opteron works. Specific to
dual Opterons with dual core, I'd like to understand the details of how
the four cores can/should share memory bandwidth.
Click to expand...

Do you got something more specific you'd like to ask?

Yousuf Khan
 
I'm interested in how the bandwidth of AMD Opteron works. Specific to
dual Opterons with dual core, I'd like to understand the details of how
the four cores can/should share memory bandwidth.

I'm considering use of a Tyan S2882-D motherboard. I think that will be
a good choice for my servers but want to assure myself (and others)
about the best way to manage four cores for best performance. (Running
Linux, will be using a 2.6 package with that hardware).

Thanks for any pointers to details on this topic..
Click to expand...

To find out details of the memory controller and how "nodes" are configured
try the BIOS and Kernel Developers Guide available here
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_9003,00.html
among other docs you might find useful. Depending on how much you already
know, some of it is fairly heavy going. I'm not sure you're going to have
much to "manage" anyway - although the memory arrangement is NUMA, AMD has
used the term SUMO (sufficiently uniform memory organization) to describe
it. I'm not sure how much you can tweak Linux but I'd start by running it
as it comes, "out of the box".

Also, for a good description of the processor in general, including cache
coherency/snooping take a look at the relevant articles here:
http://www.chip-architect.com/.
 
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