Intel cancels next-generation Xeon for even-more-next-generationXeon

  • Thread starter Thread starter Yousuf Khan
  • Start date Start date
Tigerton, get used to that name. Apparently it's gonna have
Hypertransport in it. :-)

Intel Shifts Plans for Server Chips: Financial News - Yahoo! Finance
http://biz.yahoo.com/ap/051024/intel_server_chips.html?.v=2

PS- oh, and it's also delaying the Montecito Itanium, as EdG posted.

Yousuf Khan
Click to expand...

Wasn't Intel talking about using a high-speed interconnect a long time
ago, maybe a year or two before Opteron? GIO or something? What happened
with that?

And not long ago I read somewhere Intel was going to use a dual bus like
the one AMD used on the Athlon MP, I can only hope that was false or
they have now dumped that too, I doubt it would get them far, still a
shared bus right?

Ed
 
Wasn't Intel talking about using a high-speed interconnect a long time
ago, maybe a year or two before Opteron? GIO or something? What happened
with that?
Click to expand...

Well there was NGIO and then 3GIO, which became PCI Express.

IIRC 2007 is the scheduled intro of the common Intanium/x86 bus, which is
expected to be an integrated memory controller architecture a packetized
I/O bus -- CSI or sumthin'??.
And not long ago I read somewhere Intel was going to use a dual bus like
the one AMD used on the Athlon MP, I can only hope that was false or
they have now dumped that too, I doubt it would get them far, still a
shared bus right?
Click to expand...

I believe the dual independent bus is scheduled for next year some time
with the new 65nm & P-M derived desktop/server chips... dunno if that's
what Bensley is supposed to be. All those damned code names drive me nuts.
 
EdG said:
Wasn't Intel talking about using a high-speed interconnect a long time
ago, maybe a year or two before Opteron? GIO or something? What happened
with that?
Click to expand...

Yeah, that was 3GIO, which became Arapahoe, which became PCI-Express.
That was in a futile attempt to derail any momentum building for AMD's
Hypertransport. Of course PCI-E is no competition for HT, it's much too
bloated to be a chip-to-chip interconnect. AMD never fell for it, and
kept HT as simple as possible while Intel threw as much bling-bling
into PCI-e to dazzle people with features.

Now it looks like AMD might even use PCI-e against Intel, if the
rumours about AMD building a PCI-e link directly into its processors
can be believed.
And not long ago I read somewhere Intel was going to use a dual bus like
the one AMD used on the Athlon MP, I can only hope that was false or
they have now dumped that too, I doubt it would get them far, still a
shared bus right?
Click to expand...

Yeah, I think that was supposed to be in the Deerfield processor that
Intel just cancelled.

Yousuf Khan
 
Yeah, that was 3GIO, which became Arapahoe, which became PCI-Express.
That was in a futile attempt to derail any momentum building for AMD's
Hypertransport. Of course PCI-E is no competition for HT, it's much too
bloated to be a chip-to-chip interconnect. AMD never fell for it, and
kept HT as simple as possible while Intel threw as much bling-bling
into PCI-e to dazzle people with features.

Now it looks like AMD might even use PCI-e against Intel, if the
rumours about AMD building a PCI-e link directly into its processors
can be believed.


Yeah, I think that was supposed to be in the Deerfield processor that
Intel just cancelled.

Yousuf Khan
Click to expand...

The whole fleet of next years Xeons (now heating up verification labs at
select OEMs) use a separate hose for each processor to MCH connection. They're
not going to get to 1333mhz fsb speeds with daisy-chains...
 
The whole fleet of next years Xeons (now heating up verification labs at
select OEMs) use a separate hose for each processor to MCH connection. They're
not going to get to 1333mhz fsb speeds with daisy-chains...
Click to expand...

Ok, but am I the only one who detects Intel trying to defend the
indefensable? IBM tried to hold the "upper ground" too, oh, about 15
years ago. ...and had a better position (different ISA).
 
keith said:
Ok, but am I the only one who detects Intel trying to defend the
indefensable? IBM tried to hold the "upper ground" too, oh, about 15
years ago. ...and had a better position (different ISA).
Click to expand...

Hey, speaking of IBM defending the indefensible. They just picked up
Solaris as one of their OS choices on their blade servers.

Sun freezes hell, gets IBM to sell Solaris on blades | The Register
http://www.theregister.co.uk/2005/10/27/sun_ibm_solarisblade/

Yousuf Khan
 
Yeah, that was 3GIO, which became Arapahoe, which became PCI-Express.
That was in a futile attempt to derail any momentum building for AMD's
Hypertransport. Of course PCI-E is no competition for HT, it's much too
bloated to be a chip-to-chip interconnect. AMD never fell for it, and
kept HT as simple as possible while Intel threw as much bling-bling
into PCI-e to dazzle people with features.
Click to expand...

How is it bloated, oh font of interconnect wisdom? Perhaps you don't
realize it, but serial interconnects are far higher bandwidth...
Now it looks like AMD might even use PCI-e against Intel, if the
rumours about AMD building a PCI-e link directly into its processors
can be believed.
Click to expand...

I don't see how that is "using PCI-e against Intel"...
Yeah, I think that was supposed to be in the Deerfield processor that
Intel just cancelled.
Click to expand...

No it's not cancelled moron. Deerfield is a LV IPF part. They
cancelled Whitefield. White, not deer.

Intel's next gen server chipset is a wonderful piece of work and
features dual independent FSBs. I suspect the next generation after
that will feature 4 or more.

David
 
Del> You must have missed this back in june....

Del> http://news.com.com/IBM+backs+Suns+Solaris,+renews+Java+pact/2100-1007_3-5764485.html

Del> remember the new ibm motto, "anything for a buck" :-)

Del> del


Actually no surprise here. This is the direction IBM has been moving
for some time and that is OS neutral. IBM has been changing to a
service company and has stated that clearly. The only hardware
division IBM wants to keep is the mainframe division because there is
very little competition and it is still a cash cow.

Heck if they can sale windows they can sale anything ;-)). Well
depends on the contract with M$, but I think after the last anti-trust
lawsuit that M$ won't have a contract like that soon.

Whatever.

Alan
 
David said:
How is it bloated, oh font of interconnect wisdom? Perhaps you don't
realize it, but serial interconnects are far higher bandwidth...




I don't see how that is "using PCI-e against Intel"...




No it's not cancelled moron. Deerfield is a LV IPF part. They
cancelled Whitefield. White, not deer.

Intel's next gen server chipset is a wonderful piece of work and
features dual independent FSBs. I suspect the next generation after
that will feature 4 or more.

David
Click to expand...

Dual FSB on the chipset. Those guys must be geniuses. (ever look at
summit?)

del
 
How is it bloated, oh font of interconnect wisdom? Perhaps you don't
Dual FSB on the chipset. Those guys must be geniuses. (ever look at
summit?)
Click to expand...

I most certainly have looked at Summit, although only with passing
interest. I truly paid attention to the X3 chipset (BTW, do you sit
near Jeff Brown?)

http://www.realworldtech.com/page.cfm?ArticleID=RWT042405213553

As you pointed out, Intel's Blackford chipset is quite similar to IBM's
X2 and X3 chipsets.

David
 
David said:
How is it bloated, oh font of interconnect wisdom? Perhaps you don't
realize it, but serial interconnects are far higher bandwidth...
Click to expand...

Convince me how you'd use PCIe as a transport mechanism for
cache-coherent processor-to-processor traffic.
I don't see how that is "using PCI-e against Intel"...
Click to expand...

It ends up being a higher performance connection than anything Intel
could do itself.
No it's not cancelled moron. Deerfield is a LV IPF part. They
cancelled Whitefield. White, not deer.
Click to expand...

Well, then I guess we'll await cancellation of Deerfield later. :-)
Intel's next gen server chipset is a wonderful piece of work and
features dual independent FSBs. I suspect the next generation after
that will feature 4 or more.
Click to expand...

Such impressive sophistication. Who would've believed this technology
just some years ago? :-)

Yousuf Khan
 
How is it bloated, oh font of interconnect wisdom? Perhaps you don't
realize it, but serial interconnects are far higher bandwidth...


I don't see how that is "using PCI-e against Intel"...


No it's not cancelled moron. Deerfield is a LV IPF part. They
cancelled Whitefield. White, not deer.

Intel's next gen server chipset is a wonderful piece of work and
features dual independent FSBs.
Click to expand...

'Cept they're a trifle late to the party - IBM's already done it.
I suspect the next generation after
that will feature 4 or more.
Click to expand...

If you'd been paying attention, it'd be clear that the "next generation"
will be no more FSB - it won't exist, it'll be kaput, it'll be an err,
ex-FSB. The only reason that Intel is not going to an intergrated memory
controller sooner is because of the mess of market segmentation they've
attempted to create - IOW the marketing tail has been wagging the technical
dog for far too long.

In fact *I* suspect that the just cancelled chip was to be the last FSB CPU
- IOW the road-map adjustment which brings a later development forward to
replace it is the first integrated memory controller CPU. Untangling
marketing bungles, rearranging road-maps which are falling apart under
competitive pressures, does take some time and umm, energy.
 
George said:
In fact *I* suspect that the just cancelled chip was to be the last FSB CPU
- IOW the road-map adjustment which brings a later development forward to
replace it is the first integrated memory controller CPU. Untangling
marketing bungles, rearranging road-maps which are falling apart under
competitive pressures, does take some time and umm, energy.
Click to expand...

No, far more mundane reasons: office politics. BTW, Whitefield was
apparently the name of a suburb in Bangalore, India.

Intel's Xeon chip kill is result of chaos in India | The Register
http://www.theregister.co.uk/2005/10/28/intel_whitefield_india/

Yousuf Khan
 
keith said:
Ok, but am I the only one who detects Intel trying to defend the
indefensable? IBM tried to hold the "upper ground" too, oh, about 15
years ago. ...and had a better position (different ISA).
Click to expand...

Here's another article about it. It looks like the whole mainstream
media is finally waking upto the fact that Intel is not going to simply
come back after this one. It's built up a tremendous trailing position
of several years distance, which is getting damn near insurmountable.

InformationWeek Weblog: Intel Self-Destruct Mode Aids AMD Momentum
http://www.informationweek.com/blog/main/archives/2005/10/intel_selfdestr_1.html

Yousuf Khan
 
David Kanter said:
I most certainly have looked at Summit, although only with passing
interest. I truly paid attention to the X3 chipset (BTW, do you sit
near Jeff Brown?)
Click to expand...
yes. one floor down. Although with all the moves in the last couple
weeks we may be temporarily on same floor.
http://www.realworldtech.com/page.cfm?ArticleID=RWT042405213553

As you pointed out, Intel's Blackford chipset is quite similar to IBM's
X2 and X3 chipsets.

David
Click to expand...

Only ours is better. :-)
 
Del said:
yes. one floor down. Although with all the moves in the last couple
weeks we may be temporarily on same floor.


Only ours is better. :-)
Click to expand...

I'll tell you what, if you can convince the PMs and PR folks involved,
have them send me a rather large, fully loaded box and I can prove it
(or disprove it).

DK
 
Here's another article about it. It looks like the whole mainstream
media is finally waking upto the fact that Intel is not going to simply
come back after this one. It's built up a tremendous trailing position
of several years distance, which is getting damn near insurmountable.

InformationWeek Weblog: Intel Self-Destruct Mode Aids AMD Momentum
http://www.informationweek.com/blog/main/archives/2005/10/intel_selfdestr_1.html

Yousuf Khan
Click to expand...

If only the ones sitting in corner offices and making procurement
decisions read InformationWeek or any other "mainstream media"... But
if they commute by car they almost certainly listen to that jingle on
the radio while driving. And when they watch TV they certainly watch
the blue men (BTW, in Russian "blue men" is just another expression
for "fags") - these executive folks rearly have sufficient programming
skills to program even TiVo so they are likely not skipping the ads.
AMD may be leaps and bounds ahead of Intel in terms of technology, but
I don't see them surpassing Intel marketing dept. any time soon.
Besides, "nobody ever has been fired for buying Intel" still holds
true.
NNN
 
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