Intel abandons x86 emulation on Itanium

  • Thread starter Thread starter Yousuf Khan
  • Start date Start date
daytripper said:
Do black holes have a bottom?
Click to expand...

I remember that being discussed in a Relativity class about 20
years ago and the answer was a Clintonesque "That depends on
what your definition of bottom is." Wish I could remember more
than that.
 
Rob Stow said:
I remember that being discussed in a Relativity class about 20 years
ago and the answer was a Clintonesque "That depends on what your
definition of bottom is." Wish I could remember more than that.
Click to expand...

Since you approach light speed as you fall in, time and distance do funny
things. Or so the physics doods say. Also the tidal forces and
gravitational gradient will rip you apart. :-)

del
 
Since you approach light speed as you fall in, time and distance do funny
things. Or so the physics doods say. Also the tidal forces and
gravitational gradient will rip you apart. :-)
Click to expand...

I guess that's a "matter" of perspective. You'll never notice making it
past the event horizon, time dialation and all. ...but AMD will. ;-)
 
They have been working on improving the software emulation for 3 years so
that they can drop the x86 hardware support. The reason Itanium failed is
because the x86 software never ran better than it did on the available Xeon
parts anyway. Porting software is expensive and Itanium is losing that war
badly. There is not a big enough installed base to spend money on a
validation and porting team... particularly with the thin budgets software
makers deal with these days. It's only hope is to be a server platform
since the PC has just about killed the workstation anyways. The differences
between the two are extremely blurred and the extra price of the workstation
isn't generally worth the small performance gains. There is now the
notebook, the PC, and the server(s) they attach to.

Yousuf Khan said:
Intel scraps once-crucial Itanium feature | CNET News.com
Click to expand...
http://news.com.com/Intel+scraps+once-crucial+Itanium+feature/2100-1006_3-6028817.html
 
Judd said:
They have been working on improving the software emulation for 3 years so
that they can drop the x86 hardware support.
Click to expand...

They never removed the hardware emulation all of this time, even though
the software emulation was already available. So to answer your question
in the subject line, yes it's really news.

Yousuf Khan
 
Intel scraps once-crucial Itanium feature | CNET News.com
http://news.com.com/Intel+scraps+once-crucial+Itanium+feature/2100-1006_3-6028817.html
Click to expand...

This is actually a none-issue (and not JUST because Itanium is, as
Daytripper said, deader than dead). They're just removing the
hardware emulation of x86 which isn't even used anymore on current
IA-64 chips. The chips will continue to support x86 programs exactly
like how current IA-64 systems do things, ie through the software
emulation IA-32EL.
 
They never removed the hardware emulation all of this time, even though
the software emulation was already available. So to answer your question
in the subject line, yes it's really news.
Click to expand...

Huh? Maybe you want to rephrase this? I can't follow your
pile-on negatives.
 
Keith said:
Huh? Maybe you want to rephrase this? I can't follow your
pile-on negatives.
Click to expand...

Okay, the hardware emulator has always been around for all of this time,
and there was never any announcement that they were going to remove it.
Even in prior rumours about Montecito. So this is news.

Yousuf Khan
 
Okay, the hardware emulator has always been around for all of this time,
and there was never any announcement that they were going to remove it.
Even in prior rumours about Montecito. So this is news.
Click to expand...

Bollocks.

There have been a total of 3 microarchitectural implementations of
IPF.

Merced
McKinley ->Madison (130nm shrink) ->Masion 9M (more L3)
Montecito

McKinley design was started in parallel with Merced, and the x86 box was
designed into McKinley since before the first Merced silicon hit the
streets (however briefly that was). Since Madison and Madison 9M were
basically just 130nm shrink (and larger L3 cache) versions of McKinley,
all other microarchitectural elements were carried over. Montecito is the
first (medium complexity) microarchitectural revision of Itanium processor
family since McKinley, and the first chance to remove (or) add hardware
elements since Itanium processors hit the streets.

Myself and Paul DeMone were talking about Montecito possibly dropping
the IA32 box back in 2003[1].

When Intel released Montecito die photo and floor plan over 2004 and
2005, I was quite satisfied that indeed, IA32 hardware box had been
dropped from Montecito. I have no idea that this "news" would be
shocking to anyone that is remotely interested in technical details
about Itanium implementations. This "news report" from news.com is
very stale, if they knew about processor floor plans, bothered
to look at Montecito die layout, and understood at least a bit about
the binary translation technique now used by IPF, they wouldn't have
written such a story that made it seem as if this is something that
was shocking to anyone that had a clue.

[1] http://www.realworldtech.com/forums...ostNum=1860&Thread=10&roomID=11&entryID=24375
 
Bollocks.

There have been a total of 3 microarchitectural implementations of
IPF.

Merced
McKinley ->Madison (130nm shrink) ->Masion 9M (more L3)
Montecito

McKinley design was started in parallel with Merced, and the x86 box was
designed into McKinley since before the first Merced silicon hit the
streets (however briefly that was). Since Madison and Madison 9M were
basically just 130nm shrink (and larger L3 cache) versions of McKinley,
all other microarchitectural elements were carried over. Montecito is the
first (medium complexity) microarchitectural revision of Itanium processor
family since McKinley, and the first chance to remove (or) add hardware
elements since Itanium processors hit the streets.
Click to expand...

I remembered that Merced was the Intel design, while McKinley was the HP
design (yes, started in parallel). I thought McKinley dropped or at least
minimized x86 hardware emulation because x86 wasn't important to HP.
Maybe I remember wrong. In any case, dropping x86 support isn't a
surprise. It never was worth much.
 
David Wang said:
Okay, the hardware emulator has always been around for all of this time,
and there was never any announcement that they were going to remove it.
Even in prior rumours about Montecito. So this is news.
Click to expand...

Bollocks.

There have been a total of 3 microarchitectural implementations of
IPF.

Merced
McKinley ->Madison (130nm shrink) ->Masion 9M (more L3)
Montecito

McKinley design was started in parallel with Merced, and the x86 box was
designed into McKinley since before the first Merced silicon hit the
streets (however briefly that was). Since Madison and Madison 9M were
basically just 130nm shrink (and larger L3 cache) versions of McKinley,
all other microarchitectural elements were carried over. Montecito is the
first (medium complexity) microarchitectural revision of Itanium processor
family since McKinley, and the first chance to remove (or) add hardware
elements since Itanium processors hit the streets.

Myself and Paul DeMone were talking about Montecito possibly dropping
the IA32 box back in 2003[1].

When Intel released Montecito die photo and floor plan over 2004 and
2005, I was quite satisfied that indeed, IA32 hardware box had been
dropped from Montecito. I have no idea that this "news" would be
shocking to anyone that is remotely interested in technical details
about Itanium implementations. This "news report" from news.com is
very stale, if they knew about processor floor plans, bothered
to look at Montecito die layout, and understood at least a bit about
the binary translation technique now used by IPF, they wouldn't have
written such a story that made it seem as if this is something that
was shocking to anyone that had a clue.

[1]
Click to expand...
http://www.realworldtech.com/forums...ostNum=1860&Thread=10&roomID=11&entryID=24375

Thank you David. I absolutely remember you and DeMone talking about this
possibility years ago which is what surprised me about Yousuf's comments.
Almost everyone who follows Itanium or Intel processors period knew this was
coming.
 
Judd said:
Thank you David. I absolutely remember you and DeMone talking about this
possibility years ago which is what surprised me about Yousuf's comments.
Almost everyone who follows Itanium or Intel processors period knew this was
coming.
Click to expand...

What are you getting so worked up over it for? So you figured out that
they were likely going to drop the x86 hardware support a long time ago,
congratulations this is your official proof that you were right.

Yousuf Khan
 
I remembered that Merced was the Intel design, while McKinley was the HP
design (yes, started in parallel).
Click to expand...

It isn't quite that simple, both designs were done by HP & Intel.
McKinley was principally done out of Ft. Collins and Merced out of
Santa Clara...however, McKinley wasn't an HP only chip, nor was Merced
an Intel only chip.
I thought McKinley dropped or at least
minimized x86 hardware emulation because x86 wasn't important to HP.
Maybe I remember wrong. In any case, dropping x86 support isn't a
surprise. It never was worth much.
Click to expand...

They completely redid the x86 hardware emulation, so that might be the
root of your recollection. It was far smaller and more efficient in
McKinley. Ironically, it's also far smaller and more efficient in
Montecito too...

It won't be getting smaller in Tukwila, but perhaps it will become more
efficient : )

DK
 
Yousuf said:
What are you getting so worked up over it for? So you figured out that
they were likely going to drop the x86 hardware support a long time ago,
congratulations this is your official proof that you were right.
Click to expand...

The official proof was around a while back, IIRC. However, most
technical journalists lack the ability to read technical documents...

DK
 
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