Integrated memory controllers for Xeons & Itaniums

[YKhan]

Intel to add memory controllers to future Xeons, Itanics | The Register
http://www.theregister.co.uk/2005/06/16/intel_integrates_mem_control/

 

[George Macdonald]

Intel to add memory controllers to future Xeons, Itanics | The Register
http://www.theregister.co.uk/2005/06/16/intel_integrates_mem_control/

Hmm, as speculated here: (e-mail address removed) last
December. The really interesting part of this is what they use for a
CPU/system interconnect... IOW the equivalent of Hypertransport.