Don't know exactly for the P4C800 as I am running a P4P800 but, both
are AMI Bios? So look at the BIOS Screen after switching the full
screen logo off and you will see:
Dual Chanel mode Linear Mode
If not Dual channel will be missing. Dont exactly what Linear mode is
and what the opposite would be.
hth
Armin
The terminology is explained in the 875 Northbridge datasheet, which
you can download from the Intel site.
http://developer.intel.com/design/chipsets/datashts/25252501.pdf (pg.129)
I think linear mode has something to do with striding through memory
linearly
In other words, if you have one stick of memory, you
walk through the memory incrementing the address by one until you
hit the end. That is linear.
The dynamic mode is triggered by the availability of more than one
row. If you have a double sided DIMM, that would be two rows. If
you have four sticks of memory (two per channel) and each is double
sided, that would be four rows. Each row can keep four pages open
(as the memory chips have four banks inside them).
The objective of dynamic mode is to touch each of the pages available
as you walk through memory. Most people would call this a form of
interleaving - between sticks. So, you go to stick A side A for the
first burst transfer, stick A side B for the second transfer,
stick B side A for the third transfer and so on. The pattern repeats
four times, on each pass visiting a different page of the four
available in each memory chip. Then, the actual address fed to the
DIMMs is incremented, and the pattern of sixteen transactions starts
again.
Why do this ? There is a page timer in the Northbridge, and it wastes
a few cycles closing pages after the value in the page timer has
expired. The dynamic addressing mode keeps more of the pages open, in
effect attempting to change the "locality of access" by its
interleaving pattern. The DA mode assumes that the CPU will tend to
focus on small areas of ram, and by interleaving, DA spreads the
accesses more evenly over all the memory.
So, that leaves the question of why have a page timer at all. I think
that if the page timer closes a page, because it hasn't been accessed
recently, this eliminates the need to do it later, when some other
data is needed critically from that area of memory. In other words,
the page timer says it is OK to close a page of memory, when the
memory is not otherwise occupied (i.e. when the memory controller is
idle, it can keep busy by closing pages that the page timer tells it
about). Not really sure though... I'm guess I need to buy a book on
this stuff.
The Intel datasheet leaves a lot to the imagination.
Also, for the best explanation of how to populate the memory on a
P4P800/P4C800, you should read an Intel motherboard manual. See
ftp://download.intel.com/design/motherbd/bz/C3176501.pdf (pg.23)
HTH,
Paul
