M
mike
it's my understanding that each new sdram type doubles the bandwidth of
the previous via (among other things) a larger prefetch buffer:
type prefetch(bits)
---- --------------
sdr 1
ddr 2
ddr2 4
ddr3 8
i'm trying to determine whether the following is true or not:
prefetching increases the amount of memory read adjacent to the specified
address, or to put it another way, it reads a larger block size. so
aside from the effect of locality of reference, which can yield up to the
advertised performance gain (ie: sequential read), it doesn't improve
random access at all (by random, in this context, i mean each memory
access is outside of any buffering/caching).
i'd like to find documentation that either confirms or denies the
above, but having read a fairly large number of articles on the subject
haven't been able to determine this.
the previous via (among other things) a larger prefetch buffer:
type prefetch(bits)
---- --------------
sdr 1
ddr 2
ddr2 4
ddr3 8
i'm trying to determine whether the following is true or not:
prefetching increases the amount of memory read adjacent to the specified
address, or to put it another way, it reads a larger block size. so
aside from the effect of locality of reference, which can yield up to the
advertised performance gain (ie: sequential read), it doesn't improve
random access at all (by random, in this context, i mean each memory
access is outside of any buffering/caching).
i'd like to find documentation that either confirms or denies the
above, but having read a fairly large number of articles on the subject
haven't been able to determine this.