I think this is a symptom of the CMOS battery being too low. It can be
replaced.
You can flick it out with a screwdriver!
There aren't much in the way of issues in doing that. i think the
battery has 2 letters followed by 4 digits. e.g. something like CR
2032 or something.. And there's something along the lines of the
letters not mattering. So you buy a new battery with the same number.
i just go into my electronics store, show them the battery i took out,
and they point me to a replacement. Dead cheap. it's like a big watch
battery. Like a silver coin.
I guess it's worth noting which way the one in there goes in. just so
you don't put the new one in the wrong way.
I wasn't able to find an article describing the timekeeping features
of Vista, so this description is consistent with past OSes. Vista
really shouldn't be that much different.
For this issue, the computer has three important states.
1) All power removed from computer. You pulled the plug. RTC clock
runs from the CMOS battery.
2) Computer is in standby. Contents of RAM are being maintained by
the +5VSB rail of the power supply. Typically the LED on the front
panel of the computer is flashing once a second or so, telling you
the computer is in standby. RTC clock is powered by +5VSB in this
case.
3) Computer is fully operational. Operating system has its own
"software clock", and the RTC is not used, until it is time to
shutdown. (The RTC is still running, and it is running from +5VSB.
If the computer crashed, the OS would get the time, on the next
boot, from the RTC.)
In (1), there is only one source of power. That is the CMOS battery.
When the computer is not fully operational, timekeeping is via the RTC
in the Southbridge. There is a tiny quartz crystal near the Southbridge,
and it runs at 32768 Hz, just like a digital watch. The RTC will be
about as good as a digital watch at keeping the time. The RTC will stop,
and perhaps the CMOS contents will be lost, if the battery drops below
2 volts or so. But otherwise, the RTC should work as well as your
digital watch. If there are no problems with keeping your BIOS
settings, then chances are the RTC will be fine as well.
When the computer is in standby, or the soft off state, +5VSB is available.
The +5VSB is regulated down to the same voltage range as the CMOS battery.
Via a diode ORing scheme, the RTC runs off +5VSB preferentially in this
case. So, in (2), you are not dependent on the CMOS battery. As long as
the +5VSB voltage is provided by the PSU, it preferentially powers the RTC,
keeps CMOS contents, and keeps the digital watch running.
When the computer wakes up, the operating system reads the RTC. The time
is copied into memory. At that point, a different time keeping mechanism
is used. The hardware delivers clock tick interrupts many times a second.
For each interrupt delivered, the OS increments the OS maintained software
clock. Since the interrupt generator derives it timing from the motherboard
clock generator chip, the time accuracy is now traceable to the clock
generator chip and not the RTC. Later, when you go to shut down the computer,
the software clock value can be written back to the RTC, so that the RTC can
maintain the time (or, at least there is an opportunity to do so - I don't
know if they do this every time or not).
There is no reason to assume the clock generator chip and its quartz
timing source, is any different than the RTC. They are both going to
be pretty cheap time sources, perhaps good to 100ppm or worse.
To fix that, many OSes use NTP (network time protocol). By querying
a network server at regular intervals, it is possible to synchronize
the system clock(s). Not only can NTP correct the current time, but
by looking at successive time differences detected, a time service
can also note any "drift rate". Which means, if the system clock
always lost 1 second per day, a time keeping software could apply
corrections to the time, locally, on a more frequent basis than
the network synchronization update events.
Something the NTP software will not handle, is random variation in the
drift of the clock. For example, the computer internal temperature
will affect the drift rate. If the clock hardware was carefully
constructed with zero temperature coefficient (by balancing the
coefficients of the components so they cancel), or the quartz time
keeping pieces were held in an "oven" at constant temperature, then
temperature induced variation could be removed. But since computers
don't go to that much trouble, there will be a slight randomness
caused by the temperature.
But a more significant mechanism, can be if the OS "misses" any
interrupts, or if the system clock source makes abrupt changes.
On the Nforce2 chipset, there was a problem with interrupt based
time keeping. Huge time errors, random in nature, were seen by
users. Even if the NTP synchronization rate is increased tremendously,
it still would not allow accurate timekeeping. In particular, look
at the ntp log file here, and the huge variation in corrections
needed.
http://nforcershq.com/forum/20-vt19...torder=asc&highlight=nforce2+clock&&start=190
So in an ideal situation, if the drift of the timepieces is
a steady error, it is possible for software to compensate
for the error. If timekeeping variations are random, the
software cannot improve on those. And more frequent synchronization,
simply means the time is correct only at the instant after
the update. If the drift is not predictable, and the error
in timekeeping is large, NTP cannot really help in an effective
way.
Paul
