The "24365820 table" loses me, I don't know what this refers to. Is
this jargon for something...?
I was referring to the 24365820.pdf document from Intel, page 20.
a1 didn't appear to have any correspondence
a2 vid1
a3 vid1
a4 vss
a5 vid2
a6 vid2
a7 vss
a8 vid0
a9 vid0
b1 didn't appear to have any correspondence
b2 vid3
b3 vid3
b4 vss
b5 bsel0
b6 tms
v7 vss
v8 bsel1
b9 vss
First off, "tms" cannot be on there, because "tms" is part of the JTAG
test chain, and has nothing to do with configuring a processor like
those other jumpers.
Here is my hypothesis:
------------------------------------------------------------------------
Based on the signals you are finding, there are six signals that Lin-Lin
are trying to control. They are VID3, VID2, VID1, VID0 to set the
voltage, and BSEL1,BSEL0 to set the FSB frequency. Inside the processor,
these signals are either open circuit (to represent a logic 1) or shorted
to VSS (to represent a logic 0). An external pullup resistor is used to
make the logic 1 voltage level. So, what Lin-Lin has to do with a group
of three pins, is either pass the original signal untouched, or ground
the signal to VSS. In the figure below, a group of three header pins is
denoted as A,B,C and the group of three pins is repeated six times for
a total of 18 pins.
Socket top VCC
Processor | / | |
Option | / Socket bottom | / Pullup
| / \ | \ Resistor
Open CCT x | | | | /
| v v | | Vcore
x-----x-----------A B-------x-----x---------Regulator
| |
VSS x | C VSS |
1) To pass the processor defaults, connect A to B
2) To force a signal to logic 1, use no jumper. The pullup resistor
will make a logic 1.
3) To force a signal to logic 0, connect B to C.
In a group of three pins, the middle pin must be pin B in the figure
above, so the jumper can either pivot to A (to pass the default value)
or pivot to C (to force a logic 0). Pin A goes to the socket hole on
top of the adapter, while Pin B goes to the pin on the bottom of the
socket. C goes to VSS.
------------------------------------------------------------------------
which gives me this:
no jumpers at a1 thru b3 gives 1.30V
a8-a9 1.35V
a2-a3 1.40V
a2-a3 a8-a9 1.45V
a5-a6 1.50V
a5-a6 a8-a9 1.55V
a2-a3 a5-a6 1.60V
a2-a3 a5-a6 a8-a9 1.65V
b2-b3 1.70V
a8-a9 b2-b3 1.75V
a2-a3 b2-b3 1.80V
a2-a3 a8-a9 b2-b3 1.85V
a4-a5 b2-b3 1.90V
a8-a9 b2-b3 1.95V
a2-a3 a5-a6 b2-b3 2.00V
a2-a3 a5-a6 a8-a9 b2-b3 2.05V
Kind of confirms the japanese website. Only strangeness is that I do
not boot at the 1.5 settings.
yeah, 1.5 or 1.52v.
thanks so much paul for teaching me new tricks, i would never have
done this on my own.
regards, eric
What was BSEL set to when you tried 1.5V ?
BSEL1 BSEL0
0 0 66 MHz see reference (a)
0 1 100 MHz see reference (b)
1 0 Reserved
1 1 133 MHz see reference (c)
a) ftp://download.intel.com/design/celeron/datashts/24365820.pdf (pg.23)
b)
http://support.intel.com/design/celeron/datashts/29859604.pdf (pg.24)
c) ftp://download.intel.com/design/PentiumIII/datashts/24965704.pdf (pg.26)
I don't have an answer for why it didn't boot, other than the BIOS
screwing around. On a "JumperFree" board, the BIOS first reads the
values of the signals (by putting some GPIO signals into input mode),
and then drives out any value it wants by putting the GPIO signals
into output mode. There are other resistors in the circuit, to prevent
the GPIO from getting burnt by a processor shorting a signal to VSS.
But ultimately, the GPIO has the strongest influence on the final
value used by the voltage regulator. Maybe the BIOS runs first by using
the processor assigned VID values, then after processor identification
is complete, it drives out the value it wants - Asus is known for not
allowing undervolting on processors, and if the processor is
misidentified, this could be a strange voltage.
HTH,
Paul
