Yeah, that's what I've been led to believe as well until now too.
Well, at 90nm that would mean that AMD will have both Fab 30 and 36 at
the same process which would be the equivalent of 3 times their existing
Fab 30-only capacity (assuming that 300mm @90nm is twice the number of
dice as 200mm @90nm). Then there's also Chartered outsourcing for them.
Oh sure they'll have the increased volume from wafer size but Intel will
have crowing rights for the spin-doctors and anal...ysts. I'm a little on
the fence, but hopeful, about Chartered - they have been shakey for about a
year now and we'll have to see if they can pull it off... with maybe a
little help from IBM?
I'd also thought that DSL had been present in AMD's chips since early this
year; in fact I'd thought that was how they managed to ramp up the clocks
on the 90nm process after the limited clock Winchesters but according to
this article
http://www.technologyreview.com/articles/05/02/wo/wo_brown020305.asp?p=1
admittedly from back in Feb05, it should be coming out about now... so
something to keep an eye on. Could be that AMD has decided they have
enough in the bag to stay with 90nm for another year... if true, something
they could do a better job of with leaked PR to the usual investor house
monkeys. I mean all this crap about a cobbled together dual "solution",
65nm, leapfrogging etc, and some fundamental process advance by AMD/IBM
gets "missed"??
Further thought on strained silicon: I see that, whereas AMD has already
paid the piper on that, Intel is being sued by Amberwave for patent
infringement... interesting.Ô_ô Dunno where IBM stands here but one of the
original researchers, Jeffrey Welser, is now an IBM employee... interesting
background here
http://www.sciencenews.org/articles/20040228/bob8.asp.