Y
Yousuf Khan
X-bit labs - AMD Thinks Triple-Core Microprocessors – Rumours.
"The new triple-core microprocessors will feature the same silicon as
quad-core chips, but with one core disabled. Nevertheless, the chips
will still include 2MB of shared L3 cache and will take advantage of
other K10 micro-architecture features, such as SSE4A instruction set,
128-bit floating point units (FPU) and so on. Obviously, the chips will
also have advanced power management capabilities."
http://www.xbitlabs.com/news/cpu/display/20070914212726.html
AMD prepares three-core processors
"AMD is probably doing this for two reasons; the lesser being salvage,
the more important one being that Intel can't do it. Intel would have a
far harder time making a tri-core part until Nehalem next September - it
is easy to fuse off a core, far harder to MCM disparate cores."
http://www.theinquirer.net/default.aspx?article=42369
"The new triple-core microprocessors will feature the same silicon as
quad-core chips, but with one core disabled. Nevertheless, the chips
will still include 2MB of shared L3 cache and will take advantage of
other K10 micro-architecture features, such as SSE4A instruction set,
128-bit floating point units (FPU) and so on. Obviously, the chips will
also have advanced power management capabilities."
http://www.xbitlabs.com/news/cpu/display/20070914212726.html
AMD prepares three-core processors
"AMD is probably doing this for two reasons; the lesser being salvage,
the more important one being that Intel can't do it. Intel would have a
far harder time making a tri-core part until Nehalem next September - it
is easy to fuse off a core, far harder to MCM disparate cores."
http://www.theinquirer.net/default.aspx?article=42369