Albert said:
Quick question: I have 3 sticks of PC2100 DDR 256 meg. They are
matched and test fine. When I use leave slot 3 empty I get 30% better
benchmarks than when I use the third stick. Any reason for this other
than 'some MOBOs don't like it when you use 3 sticks?' Thanks. PS.
What's the Zen on this... 1&2? 2&3? 1&3? Thanks again.
Have a great day,
Albert
On motherboards where the manual lists a limit on the number of modules
that can be used at high speed, sometimes the BIOS is programmed to
crank down the memory clock, when it detects all slots filled. Just
check out the memory parameters in the BIOS, and see what is changed
there. Go into manual mode, and teach it who is boss. As you say,
there isn't any voodoo in there, all behaviors can be
explained, eventually...
Whenever you make changes to your memory subsystem, test the
memory with MEMTEST86 from memtest86.com (free).
As for folklore, one stick of ram, place it furthest from the processor
(next to termination resistors). Two sticks of ram go in 1 & 3 (to
spread out impedance discontinuities). More sticks added causes more
discontinuities and more electrical signal reflections.
I think this is the memory termination type here (SSTL_2 Class 1). I
got this document at Micron a long time ago, but it should be available
by now for free from the JEDEC site as well (EIA/JESD8-9). The
parallel termination is at the end of the bus.
http://download.micron.com/pdf/misc/sstl_2spec.pdf
0.5xVDDQ
|
+--------------
| |
Parallel Bypass
Termination Caps
Resistor |
| Ground
Driver---series_resistor---slot-slot-slot------+
Multidrop busses never work well, but the economics of the thing
dictate that this is how it is designed.
HTH,
Paul
